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minor update - mux reordering to reduce critical path on input data

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This commit is contained in:
Blaise Tine 2021-03-21 11:43:57 -07:00
parent f7d6b71ac2
commit bd40e7db70
2 changed files with 6 additions and 5 deletions
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3
hw/rtl/VX_ibuffer.v
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@ -82,8 +82,7 @@ module VX_ibuffer #(
if (writing && is_slot0) begin
q_data_out[i] <= q_data_in;
end
if (pop) begin
end else if (pop) begin
q_data_out[i] <= q_data_prev[i];
end
end

8
hw/rtl/libs/VX_skid_buffer.v
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@ -81,9 +81,11 @@ module VX_skid_buffer #(
always @(posedge clk) begin
if (push) begin
buffer <= data_in;
end
if (pop) begin
data_out_r <= use_buffer ? buffer : data_in;
end
if (pop && !use_buffer) begin
data_out_r <= data_in;
end else if (pop) begin
data_out_r <= buffer;
end
end