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minor update
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parent
f57fa82028
commit
c5aec572b5
2 changed files with 56 additions and 6 deletions
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@ -4,8 +4,7 @@ module VX_elastic_buffer #(
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parameter DATAW = 1,
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parameter SIZE = 2,
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parameter BUFFERED = 0,
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parameter FASTRAM = 0,
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parameter PASSTHRU = 0
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parameter FASTRAM = 0
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) (
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input wire clk,
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input wire reset,
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@ -18,7 +17,7 @@ module VX_elastic_buffer #(
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input wire ready_out,
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output wire valid_out
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);
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if (PASSTHRU) begin
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if (SIZE == 0) begin
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`UNUSED_VAR (clk)
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`UNUSED_VAR (reset)
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@ -27,6 +26,22 @@ module VX_elastic_buffer #(
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assign data_out = data_in;
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assign ready_in = ready_out;
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end else if (SIZE == 2) begin
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VX_skid_buffer #(
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.DATAW (DATAW),
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.USE_FASTREG (BUFFERED)
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) queue (
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.clk (clk),
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.reset (reset),
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.valid_in (valid_in),
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.data_in (data_in),
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.ready_in (ready_in),
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.valid_out (valid_out),
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.data_out (data_out),
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.ready_out (ready_out)
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);
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end else begin
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wire empty, full;
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@ -2,15 +2,50 @@
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module VX_onehot_mux #(
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parameter DATAW = 1,
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parameter N = 1
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parameter N = 1,
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parameter MODEL = 1
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) (
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input wire [N-1:0][DATAW-1:0] data_in,
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input wire [N-1:0] sel_in,
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output wire [DATAW-1:0] data_out
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);
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if (N > 1) begin
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for (genvar i = 0; i < N; ++i) begin
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assign data_out = sel_in[i] ? data_in[i] : 'z;
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if (MODEL == 1) begin
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for (genvar i = 0; i < N; ++i) begin
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assign data_out = sel_in[i] ? data_in[i] : 'z;
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end
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end else if (MODEL == 2) begin
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reg [DATAW-1:0] data_out_r;
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always @(*) begin
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data_out_r = '0;
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for (integer i = 0; i < N; ++i) begin
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data_out_r |= {DATAW{sel_in[i]}} & data_in[i];
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end
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end
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assign data_out = data_out_r;
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end else if (MODEL == 3) begin
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wire [N-1:0][DATAW-1:0] mask;
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for (genvar i = 0; i < N; ++i) begin
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assign mask[i] = {DATAW{sel_in[i]}} & data_in[i];
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end
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for (genvar i = 0; i < DATAW; ++i) begin
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wire [N-1:0] gather;
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for (genvar j = 0; j < N; ++j) begin
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assign gather[j] = mask[j][i];
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end
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assign data_out[i] = (| gather);
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end
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end else begin
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reg [DATAW-1:0] data_out_r;
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always @(*) begin
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data_out_r = 'x;
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for (integer i = N-1; i >= 0; --i) begin
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if (sel_in[i]) begin
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data_out_r = data_in[i];
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end
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end
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end
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assign data_out = data_out_r;
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end
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end else begin
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`UNUSED_VAR (sel_in)
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