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minor update

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This commit is contained in:
Blaise Tine 2024-03-24 20:32:33 -07:00
parent 402c911991
commit c6e09d40ff
4 changed files with 7 additions and 7 deletions
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4
docs/debugging.md
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@ -53,9 +53,9 @@ A waveform trace `trace.vcd` will be generated in the current directory during t
## Analyzing Vortex trace log
When debugging Vortex RTL or SimX Simulator, reading the trace run.log file can be overwhelming when the trace gets really large.
We provide a trace sanitizer tool under ./hw/scripts/trace_csv.py that you can use to convert the large trace into a CSV file containing all the instructions that executed with their source and destination operands.
We provide a trace sanitizer tool under ./hw/scripts/trace_csv.py that you can use to convert the large trace into a CSV file containing all the instructions that executed with their source and destination operands. To increase compatibility between traces you will need to initialize RTLSIM's GPRs to zero by defining GPR_RESET.
$ ./ci/blackbox.sh --driver=rtlsim --app=demo --debug=3 --log=run_rtlsim.log
$ CONFIGS="-DGPR_RESET" ./ci/blackbox.sh --driver=rtlsim --app=demo --debug=3 --log=run_rtlsim.log
$ ./ci/trace_csv.py -trtlsim run_rtlsim.log -otrace_rtlsim.csv
$ ./ci/blackbox.sh --driver=simx --app=demo --debug=3 --log=run_simx.log

2
hw/rtl/core/VX_int_unit.sv → hw/rtl/core/VX_alu_int.sv
View file

@ -13,7 +13,7 @@
`include "VX_define.vh"
module VX_int_unit #(
module VX_alu_int #(
parameter CORE_ID = 0,
parameter BLOCK_IDX = 0,
parameter NUM_LANES = 1

2
hw/rtl/core/VX_muldiv_unit.sv → hw/rtl/core/VX_alu_muldiv.sv
View file

@ -13,7 +13,7 @@
`include "VX_define.vh"
module VX_muldiv_unit #(
module VX_alu_muldiv #(
parameter CORE_ID = 0,
parameter NUM_LANES = 1
) (

6
hw/rtl/core/VX_alu_unit.sv
View file

@ -74,11 +74,11 @@ module VX_alu_unit #(
`RESET_RELAY (int_reset, block_reset);
VX_int_unit #(
VX_alu_int #(
.CORE_ID (CORE_ID),
.BLOCK_IDX (block_idx),
.NUM_LANES (NUM_LANES)
) int_unit (
) alu_int (
.clk (clk),
.reset (int_reset),
.execute_if (int_execute_if),
@ -103,7 +103,7 @@ module VX_alu_unit #(
.NUM_LANES (NUM_LANES)
) mdv_commit_if();
VX_muldiv_unit #(
VX_alu_muldiv #(
.CORE_ID (CORE_ID),
.NUM_LANES (NUM_LANES)
) mdv_unit (