mirror of
https://github.com/vortexgpgpu/vortex.git
synced 2025-04-23 13:27:29 -04:00
merge fixes
This commit is contained in:
Blaise Tine
parent
d1103733f5
commit
c9c34cb71a
9 changed files with 0 additions and 650 deletions
30
README.md
30
README.md
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@ -59,34 +59,4 @@ Run SGEMM OpenCL Benchmark
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$ cd Vortex/benchmarks/opencl/sgemm
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$ make
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<<<<<<< HEAD
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$ make run
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Basic Instructions to build the OpenCL Compiler for Vortex
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----------------------------------------------------------
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Build LLVM for RiscV
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$ git clone -b release/10.x https://github.com/llvm/llvm-project.git llvm
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$ cd llvm
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$ mkdir build
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$ cd build
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$ cmake -G Ninja -DCMAKE_BUILD_TYPE=Debug -DLLVM_ENABLE_PROJECTS="clang" -DBUILD_SHARED_LIBS=True -DLLVM_USE_SPLIT_DWARF=True -DCMAKE_INSTALL_PREFIX=$RISC_GNU_TOOLS_PATH -DLLVM_OPTIMIZED_TABLEGEN=True -DLLVM_BUILD_TESTS=True -DDEFAULT_SYSROOT=$RISC_GNU_TOOLS_PATH/riscv32-unknown-elf -DLLVM_DEFAULT_TARGET_TRIPLE="riscv32-unknown-elf" -DLLVM_TARGETS_TO_BUILD="RISCV" ..
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$ cmake --build . --target install
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Build pocl for RISCV
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$ git clone https://github.gatech.edu/casl/pocl.git
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$ cd pocl
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$ mkdir build
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$ cd build
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$ export POCL_CC_PATH=$PWD/../drops_riscv_cc
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$ export POCL_RT_PATH=$PWD/../drops_riscv_rt
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$ cmake -G Ninja -DCMAKE_INSTALL_PREFIX=$POCL_CC_PATH -DCMAKE_BUILD_TYPE=Debug -DWITH_LLVM_CONFIG=$RISC_GNU_TOOLS_PATH/bin/llvm-config -DNEWLIB_BSP=ON -DNEWLIB_DEVICE_ADDRESS_BIT=32 -DNEWLIB_DEVICE_MARCH=rv32im -DBUILD_TESTS=OFF -DPOCL_DEBUG_MESSAGES=ON ..
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$ cmake --build . --target install
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$ rm -rf *
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$ cmake -G Ninja -DCMAKE_INSTALL_PREFIX=$POCL_RT_PATH -DCMAKE_BUILD_TYPE=Debug -DOCS_AVAILABLE=OFF -DBUILD_SHARED_LIBS=OFF -DNEWLIB_BSP=ON -DNEWLIB_DEVICE_ADDRESS_BIT=32 -DNEWLIB_DEVICE_MARCH=rv32im -DBUILD_TESTS=OFF -DHOST_DEVICE_BUILD_HASH=basic-riscv32-unknown-elf -DCMAKE_TOOLCHAIN_FILE=../RISCV_newlib.cmake -DENABLE_TRACING=OFF -DENABLE_ICD=OFF -DPOCL_DEBUG_MESSAGES=ON ..
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$ cmake --build . --target install
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=======
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$ make run
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>>>>>>> fpga_synthesis
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@ -1,58 +1,3 @@
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<<<<<<< HEAD
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__kernel
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void convolution(
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__read_only image2d_t sourceImage,
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__write_only image2d_t outputImage,
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int rows,
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int cols,
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__constant float* filter,
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int filterWidth,
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sampler_t sampler)
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{
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// Store each work-item’s unique row and column
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int column = get_global_id(0);
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int row = get_global_id(1);
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// Half the width of the filter is needed for indexing
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// memory later
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int halfWidth = (int)(filterWidth/2);
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// All accesses to images return data as four-element vector
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// (i.e., float4), although only the 'x' component will contain
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// meaningful data in this code
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float4 sum = {0.0f, 0.0f, 0.0f, 0.0f};
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// Iterator for the filter
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int filterIdx = 0;
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// Each work-item iterates around its local area based on the
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// size of the filter
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int2 coords; // Coordinates for accessing the image
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// Iterate the filter rows
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for(int i = -halfWidth; i <= halfWidth; i++) {
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coords.y = row + i;
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// Iterate over the filter columns
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for(int j = -halfWidth; j <= halfWidth; j++) {
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coords.x = column + j;
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float4 pixel;
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// Read a pixel from the image. A single channel image
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// stores the pixel in the 'x' coordinate of the returned
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// vector.
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pixel = read_imagef(sourceImage, sampler, coords);
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sum.x += pixel.x * filter[filterIdx++];
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}
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}
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// Copy the data to the output image if the
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// work-item is in bounds
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if(row < rows && column < cols) {
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coords.x = column;
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coords.y = row;
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write_imagef(outputImage, coords, sum);
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}
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=======
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__kernel
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void convolution(
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__read_only image2d_t sourceImage,
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@ -106,5 +51,4 @@ void convolution(
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coords.y = row;
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write_imagef(outputImage, coords, sum);
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}
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>>>>>>> fpga_synthesis
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}
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@ -1,265 +1,3 @@
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<<<<<<< HEAD
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#include <stdio.h>
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#include <stdlib.h>
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#include <CL/cl.h>
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#include "utils.h"
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// This function takes a positive integer and rounds it up to
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// the nearest multiple of another provided integer
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unsigned int roundUp(unsigned int value, unsigned int multiple) {
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// Determine how far past the nearest multiple the value is
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unsigned int remainder = value % multiple;
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// Add the difference to make the value a multiple
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if(remainder != 0) {
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value += (multiple-remainder);
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}
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return value;
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}
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// This function reads in a text file and stores it as a char pointer
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char* readSource(char* kernelPath) {
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cl_int status;
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FILE *fp;
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char *source;
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long int size;
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printf("Program file is: %s\n", kernelPath);
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fp = fopen(kernelPath, "rb");
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if(!fp) {
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printf("Could not open kernel file\n");
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exit(-1);
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}
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status = fseek(fp, 0, SEEK_END);
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if(status != 0) {
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printf("Error seeking to end of file\n");
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exit(-1);
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}
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size = ftell(fp);
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if(size < 0) {
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printf("Error getting file position\n");
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exit(-1);
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}
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rewind(fp);
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source = (char *)malloc(size + 1);
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int i;
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for (i = 0; i < size+1; i++) {
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source[i]='\0';
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}
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if(source == NULL) {
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printf("Error allocating space for the kernel source\n");
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exit(-1);
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}
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fread(source, 1, size, fp);
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source[size] = '\0';
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return source;
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}
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void chk(cl_int status, const char* cmd) {
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if(status != CL_SUCCESS) {
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printf("%s failed (%d)\n", cmd, status);
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exit(-1);
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}
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}
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int main() {
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int i, j, k, l;
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// Rows and columns in the input image
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int imageHeight;
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int imageWidth;
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const char* inputFile = "input.bmp";
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const char* outputFile = "output.bmp";
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// Homegrown function to read a BMP from file
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float* inputImage = readImage(inputFile, &imageWidth,
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&imageHeight);
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// Size of the input and output images on the host
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int dataSize = imageHeight*imageWidth*sizeof(float);
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// Output image on the host
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float* outputImage = NULL;
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outputImage = (float*)malloc(dataSize);
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float* refImage = NULL;
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refImage = (float*)malloc(dataSize);
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// 45 degree motion blur
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float filter[49] =
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{0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0,
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0, 0, -1, 0, 1, 0, 0,
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0, 0, -2, 0, 2, 0, 0,
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0, 0, -1, 0, 1, 0, 0,
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0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0};
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// The convolution filter is 7x7
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int filterWidth = 7;
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int filterSize = filterWidth*filterWidth; // Assume a square kernel
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// Set up the OpenCL environment
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cl_int status;
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// Discovery platform
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cl_platform_id platform;
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status = clGetPlatformIDs(1, &platform, NULL);
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chk(status, "clGetPlatformIDs");
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// Discover device
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cl_device_id device;
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clGetDeviceIDs(platform, CL_DEVICE_TYPE_ALL, 1, &device, NULL);
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chk(status, "clGetDeviceIDs");
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// Create context
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cl_context_properties props[3] = {CL_CONTEXT_PLATFORM,
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(cl_context_properties)(platform), 0};
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cl_context context;
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context = clCreateContext(props, 1, &device, NULL, NULL, &status);
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chk(status, "clCreateContext");
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// Create command queue
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cl_command_queue queue;
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queue = clCreateCommandQueue(context, device, 0, &status);
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chk(status, "clCreateCommandQueue");
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// The image format describes how the data will be stored in memory
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cl_image_format format;
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format.image_channel_order = CL_R; // single channel
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format.image_channel_data_type = CL_FLOAT; // float data type
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// Create space for the source image on the device
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cl_mem d_inputImage = clCreateImage2D(context, 0, &format, imageWidth,
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imageHeight, 0, NULL, &status);
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chk(status, "clCreateImage2D");
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// Create space for the output image on the device
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cl_mem d_outputImage = clCreateImage2D(context, 0, &format, imageWidth,
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imageHeight, 0, NULL, &status);
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chk(status, "clCreateImage2D");
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// Create space for the 7x7 filter on the device
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cl_mem d_filter = clCreateBuffer(context, 0, filterSize*sizeof(float),
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NULL, &status);
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chk(status, "clCreateBuffer");
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// Copy the source image to the device
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size_t origin[3] = {0, 0, 0}; // Offset within the image to copy from
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size_t region[3] = {imageWidth, imageHeight, 1}; // Elements to per dimension
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status = clEnqueueWriteImage(queue, d_inputImage, CL_FALSE, origin, region,
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0, 0, inputImage, 0, NULL, NULL);
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chk(status, "clEnqueueWriteImage");
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// Copy the 7x7 filter to the device
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status = clEnqueueWriteBuffer(queue, d_filter, CL_FALSE, 0,
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filterSize*sizeof(float), filter, 0, NULL, NULL);
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chk(status, "clEnqueueWriteBuffer");
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// Create the image sampler
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cl_sampler sampler = clCreateSampler(context, CL_FALSE,
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CL_ADDRESS_CLAMP_TO_EDGE, CL_FILTER_NEAREST, &status);
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chk(status, "clCreateSampler");
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const char* source = readSource("kernel.cl");
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// Create a program object with source and build it
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cl_program program;
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program = clCreateProgramWithSource(context, 1, &source, NULL, NULL);
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chk(status, "clCreateProgramWithSource");
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status = clBuildProgram(program, 1, &device, NULL, NULL, NULL);
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chk(status, "clBuildProgram");
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// Create the kernel object
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cl_kernel kernel;
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kernel = clCreateKernel(program, "convolution", &status);
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chk(status, "clCreateKernel");
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// Set the kernel arguments
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status = clSetKernelArg(kernel, 0, sizeof(cl_mem), &d_inputImage);
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status |= clSetKernelArg(kernel, 1, sizeof(cl_mem), &d_outputImage);
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status |= clSetKernelArg(kernel, 2, sizeof(int), &imageHeight);
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status |= clSetKernelArg(kernel, 3, sizeof(int), &imageWidth);
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status |= clSetKernelArg(kernel, 4, sizeof(cl_mem), &d_filter);
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status |= clSetKernelArg(kernel, 5, sizeof(int), &filterWidth);
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status |= clSetKernelArg(kernel, 6, sizeof(cl_sampler), &sampler);
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chk(status, "clSetKernelArg");
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// Set the work item dimensions
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size_t globalSize[2] = {imageWidth, imageHeight};
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status = clEnqueueNDRangeKernel(queue, kernel, 2, NULL, globalSize, NULL, 0,
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NULL, NULL);
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chk(status, "clEnqueueNDRange");
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// Read the image back to the host
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status = clEnqueueReadImage(queue, d_outputImage, CL_TRUE, origin,
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region, 0, 0, outputImage, 0, NULL, NULL);
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chk(status, "clEnqueueReadImage");
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// Write the output image to file
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storeImage(outputImage, outputFile, imageHeight, imageWidth, inputFile);
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// Compute the reference image
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for(i = 0; i < imageHeight; i++) {
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for(j = 0; j < imageWidth; j++) {
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refImage[i*imageWidth+j] = 0;
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}
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}
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// Iterate over the rows of the source image
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int halfFilterWidth = filterWidth/2;
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float sum;
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for(i = 0; i < imageHeight; i++) {
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// Iterate over the columns of the source image
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for(j = 0; j < imageWidth; j++) {
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sum = 0; // Reset sum for new source pixel
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// Apply the filter to the neighborhood
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for(k = - halfFilterWidth; k <= halfFilterWidth; k++) {
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for(l = - halfFilterWidth; l <= halfFilterWidth; l++) {
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if(i+k >= 0 && i+k < imageHeight &&
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j+l >= 0 && j+l < imageWidth) {
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sum += inputImage[(i+k)*imageWidth + j+l] *
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filter[(k+halfFilterWidth)*filterWidth +
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l+halfFilterWidth];
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}
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}
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}
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refImage[i*imageWidth+j] = sum;
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}
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}
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int failed = 0;
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for(i = 0; i < imageHeight; i++) {
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for(j = 0; j < imageWidth; j++) {
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if(abs(outputImage[i*imageWidth+j]-refImage[i*imageWidth+j]) > 0.01) {
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printf("Results are INCORRECT\n");
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printf("Pixel mismatch at <%d,%d> (%f vs. %f)\n", i, j,
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outputImage[i*imageWidth+j], refImage[i*imageWidth+j]);
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failed = 1;
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}
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if(failed) break;
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}
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if(failed) break;
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}
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if(!failed) {
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printf("Results are correct\n");
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}
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return 0;
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=======
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#include <stdio.h>
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#include <stdlib.h>
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#include <CL/cl.h>
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@ -520,5 +258,4 @@ int main() {
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}
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return 0;
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>>>>>>> fpga_synthesis
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}
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@ -1,27 +1,11 @@
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#include <stdio.h>
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#include <stdlib.h>
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<<<<<<< HEAD
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=======
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#include "../vx_api/vx_api.h"
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>>>>>>> fpga_synthesis
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#ifdef __cplusplus
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extern "C" {
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#endif
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<<<<<<< HEAD
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struct pocl_context_t {
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uint32_t num_groups[3];
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uint32_t global_offset[3];
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uint32_t local_size[3];
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uint8_t *printf_buffer;
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uint32_t *printf_buffer_position;
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uint32_t printf_buffer_capacity;
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uint32_t work_dim;
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};
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=======
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>>>>>>> fpga_synthesis
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typedef void (*pocl_workgroup_func) (
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void * /* args */,
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void * /* pocl_context */,
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@ -30,11 +14,7 @@ typedef void (*pocl_workgroup_func) (
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uint32_t /* group_z */
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);
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<<<<<<< HEAD
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void pocl_spawn(struct pocl_context_t * ctx, const pocl_workgroup_func pfn, void * arguments) {
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=======
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void pocl_spawn(struct pocl_context_t * ctx, pocl_workgroup_func pfn, const void * args) {
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>>>>>>> fpga_synthesis
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uint32_t x, y, z;
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for (z = 0; z < ctx->num_groups[2]; ++z)
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for (y = 0; y < ctx->num_groups[1]; ++y)
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|
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|
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@ -16,12 +16,7 @@ namespace Harp {
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public:
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struct Undefined {};
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<<<<<<< HEAD
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ArchDef(const std::string &s, bool cpu_mode = false)
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: cpu_mode_(cpu_mode) {
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=======
|
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ArchDef(const std::string &s, int num_warps = 32, int num_threads = 32) {
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>>>>>>> fpga_synthesis
|
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std::istringstream iss(s.c_str());
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wordSize = 4;
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|
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@ -707,105 +707,6 @@ void Instruction::executeOn(Warp &c, trace_inst_t *trace_inst) {
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pcSet = true;
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}
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break;
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<<<<<<< HEAD
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case SYS_INST:
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//std::cout << "SYS_INST\n";
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temp = reg[rsrc[0]];
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if (!c.core->a.is_cpu_mode()) {
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//
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// GPGPU CSR extension
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//
|
||||
if (immsrc == 0x20) // ThreadID
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||||
{
|
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reg[rdest] = t;
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D(2, "CSR Reading tid " << hex << immsrc << dec << " and returning " << reg[rdest]);
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}
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else if (immsrc == 0x21) // WarpID
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{
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reg[rdest] = c.id;
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D(2, "CSR Reading wid " << hex << immsrc << dec << " and returning " << reg[rdest]);
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}
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else if (immsrc == 0x25)
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{
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reg[rdest] = c.core->num_instructions;
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}
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else if (immsrc == 0x26)
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{
|
||||
reg[rdest] = c.core->num_cycles;
|
||||
}
|
||||
} else {
|
||||
switch (func3)
|
||||
{
|
||||
case 1:
|
||||
// printf("Case 1\n");
|
||||
if (rdest != 0)
|
||||
{
|
||||
reg[rdest] = c.csr[immsrc & 0x00000FFF];
|
||||
}
|
||||
c.csr[immsrc & 0x00000FFF] = temp;
|
||||
|
||||
break;
|
||||
case 2:
|
||||
// printf("Case 2\n");
|
||||
if (rdest != 0)
|
||||
{
|
||||
// printf("Reading from CSR: %d = %d\n", (immsrc & 0x00000FFF), c.csr[immsrc & 0x00000FFF]);
|
||||
reg[rdest] = c.csr[immsrc & 0x00000FFF];
|
||||
}
|
||||
// printf("Writing to CSR --> %d = %d\n", immsrc, (temp | c.csr[immsrc & 0x00000FFF]));
|
||||
c.csr[immsrc & 0x00000FFF] = temp | c.csr[immsrc & 0x00000FFF];
|
||||
|
||||
break;
|
||||
case 3:
|
||||
// printf("Case 3\n");
|
||||
if (rdest != 0)
|
||||
{
|
||||
reg[rdest] = c.csr[immsrc & 0x00000FFF];
|
||||
}
|
||||
c.csr[immsrc & 0x00000FFF] = temp & (~c.csr[immsrc & 0x00000FFF]);
|
||||
|
||||
break;
|
||||
case 5:
|
||||
// printf("Case 5\n");
|
||||
if (rdest != 0)
|
||||
{
|
||||
reg[rdest] = c.csr[immsrc & 0x00000FFF];
|
||||
}
|
||||
c.csr[immsrc & 0x00000FFF] = rsrc[0];
|
||||
|
||||
break;
|
||||
case 6:
|
||||
// printf("Case 6\n");
|
||||
if (rdest != 0)
|
||||
{
|
||||
reg[rdest] = c.csr[immsrc & 0x00000FFF];
|
||||
}
|
||||
c.csr[immsrc & 0x00000FFF] = rsrc[0] | c.csr[immsrc & 0x00000FFF];
|
||||
|
||||
break;
|
||||
case 7:
|
||||
// printf("Case 7\n");
|
||||
if (rdest != 0)
|
||||
{
|
||||
reg[rdest] = c.csr[immsrc & 0x00000FFF];
|
||||
}
|
||||
c.csr[immsrc & 0x00000FFF] = rsrc[0] & (~c.csr[immsrc & 0x00000FFF]);
|
||||
|
||||
break;
|
||||
case 0:
|
||||
if (immsrc < 2)
|
||||
{
|
||||
//std::cout << "INTERRUPT ECALL/EBREAK\n";
|
||||
nextActiveThreads = 0;
|
||||
c.spawned = false;
|
||||
// c.interrupt(0);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
=======
|
||||
case 4:
|
||||
// BLT
|
||||
D(3, "BLT: r" << rsrc[0] << ", r" << rsrc[1] << ", imm=" << (int)immsrc);
|
||||
|
|
@ -813,7 +714,6 @@ void Instruction::executeOn(Warp &c, trace_inst_t *trace_inst) {
|
|||
if (!pcSet)
|
||||
nextPc = (c.pc - 4) + immsrc;
|
||||
pcSet = true;
|
||||
>>>>>>> fpga_synthesis
|
||||
}
|
||||
break;
|
||||
case 5:
|
||||
|
|
|
|||
|
|
@ -59,14 +59,9 @@ HarpToolMode findMode(int argc, char** argv) {
|
|||
int emu_main(int argc, char **argv) {
|
||||
string archString("rv32i");
|
||||
string imgFileName("a.dsfsdout.bin");
|
||||
<<<<<<< HEAD
|
||||
bool showHelp, showStats, basicMachine, batch;
|
||||
bool cpu_mode(false);
|
||||
=======
|
||||
bool showHelp(false), showStats(false), basicMachine(true);
|
||||
int max_warps(NUM_WARPS);
|
||||
int max_threads(NUM_THREADS);
|
||||
>>>>>>> fpga_synthesis
|
||||
|
||||
/* Read the command line arguments. */
|
||||
CommandLineArgFlag fh("-h", "--help", "", showHelp);
|
||||
|
|
@ -74,13 +69,8 @@ int emu_main(int argc, char **argv) {
|
|||
CommandLineArgSetter<string>fa("-a", "--arch", "", archString);
|
||||
CommandLineArgFlag fs("-s", "--stats", "", showStats);
|
||||
CommandLineArgFlag fb("-b", "--basic", "", basicMachine);
|
||||
<<<<<<< HEAD
|
||||
CommandLineArgFlag fi("-i", "--batch", "", batch);
|
||||
CommandLineArgFlag fx("-x", "--cpu", "", cpu_mode);
|
||||
=======
|
||||
CommandLineArgSetter<int> fw("-w", "--warps", "", max_warps);
|
||||
CommandLineArgSetter<int> ft("-t", "--threads", "", max_threads);
|
||||
>>>>>>> fpga_synthesis
|
||||
|
||||
CommandLineArg::readArgs(argc, argv);
|
||||
|
||||
|
|
@ -90,11 +80,7 @@ int emu_main(int argc, char **argv) {
|
|||
}
|
||||
|
||||
/* Instantiate a Core, RAM, and console output. */
|
||||
<<<<<<< HEAD
|
||||
ArchDef arch(archString, cpu_mode);
|
||||
=======
|
||||
ArchDef arch(archString, max_warps, max_threads);
|
||||
>>>>>>> fpga_synthesis
|
||||
|
||||
Decoder *dec;
|
||||
|
||||
|
|
|
|||
|
|
@ -1,147 +1,3 @@
|
|||
<<<<<<< HEAD
|
||||
make
|
||||
cd obj_dir
|
||||
echo start > results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-add.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-add.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-addi.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-addi.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-and.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-and.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-andi.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-andi.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-auipc.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-auipc.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-beq.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-beq.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-bge.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-bge.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-bgeu.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-bgeu.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-blt.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-blt.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-bltu.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-bltu.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-bne.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-bne.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-jal.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-jal.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-jalr.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-jalr.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-lb.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-lb.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-lbu.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-lbu.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-lh.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-lh.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-lhu.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-lhu.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-lui.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-lui.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-lw.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-lw.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-or.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-or.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-ori.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-ori.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-sb.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-sb.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-sh.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-sh.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-simple.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-simple.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-sll.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-sll.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-slli.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-slli.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-slt.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-slt.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-slti.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-slti.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-sltiu.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-sltiu.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-sltu.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-sltu.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-sra.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-sra.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-srai.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-srai.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-srl.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-srl.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-srli.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-srli.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-sub.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-sub.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-sw.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-sw.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-xor.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-xor.hex -s -b >> results.txt
|
||||
|
||||
echo ./riscv_tests/rv32ui-p-xori.hex >> results.txt
|
||||
./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-xori.hex -s -b >> results.txt
|
||||
|
||||
# echo ./riscv_tests/rv32um-p-div.hex >> results.txt
|
||||
# ./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32um-p-div.hex -s -b >> results.txt
|
||||
|
||||
# echo ./riscv_tests/rv32um-p-divu.hex >> results.txt
|
||||
# ./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32um-p-divu.hex -s -b >> results.txt
|
||||
|
||||
# echo ./riscv_tests/rv32um-p-mul.hex >> results.txt
|
||||
# ./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32um-p-mul.hex -s -b >> results.txt
|
||||
|
||||
# echo ./riscv_tests/rv32um-p-mulh.hex >> results.txt
|
||||
# ./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32um-p-mulh.hex -s -b >> results.txt
|
||||
|
||||
# echo ./riscv_tests/rv32um-p-mulhsu.hex >> results.txt
|
||||
# ./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32um-p-mulhsu.hex -s -b >> results.txt
|
||||
|
||||
# echo ./riscv_tests/rv32um-p-mulhu.hex >> results.txt
|
||||
# ./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32um-p-mulhu.hex -s -b >> results.txt
|
||||
|
||||
# echo ./riscv_tests/rv32um-p-rem.hex >> results.txt
|
||||
# ./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32um-p-rem.hex -s -b >> results.txt
|
||||
|
||||
# echo ./riscv_tests/rv32um-p-remu.hex >> results.txt
|
||||
# ./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32um-p-remu.hex -s -b >> results.txt
|
||||
|
||||
=======
|
||||
#!/bin/bash
|
||||
|
||||
make
|
||||
|
|
@ -285,4 +141,3 @@ echo ./../benchmarks/riscv_tests/rv32ui-p-xori.hex >> results.txt
|
|||
|
||||
# echo ./../benchmarks/riscv_tests/rv32um-p-remu.hex >> results.txt
|
||||
# ./Vcache_simX -E -a rv32i --core ../benchmarks/riscv_tests/rv32um-p-remu.hex -s -b >> results.txt
|
||||
>>>>>>> fpga_synthesis
|
||||
|
|
|
|||
|
|
@ -1,11 +1,3 @@
|
|||
<<<<<<< HEAD
|
||||
make
|
||||
make -C ../runtime/mains/dev
|
||||
make -C ../runtime/mains/hello
|
||||
make -C ../runtime/mains/nativevecadd
|
||||
make -C ../runtime/mains/simple
|
||||
make -C ../runtime/mains/vecadd
|
||||
=======
|
||||
#!/bin/bash
|
||||
|
||||
make
|
||||
|
|
@ -14,23 +6,14 @@ make -C ../runtime/tests/hello
|
|||
make -C ../runtime/tests/nativevecadd
|
||||
make -C ../runtime/tests/simple
|
||||
make -C ../runtime/tests/vecadd
|
||||
>>>>>>> fpga_synthesis
|
||||
|
||||
cd obj_dir
|
||||
echo start > results.txt
|
||||
|
||||
printf "Fasten your seatbelts ladies and gentelmen!!\n\n\n\n"
|
||||
|
||||
<<<<<<< HEAD
|
||||
#./Vcache_simX -E -a rv32i --core ../../runtime/mains/dev/vx_dev_main.hex -s -b 1> emulator.debug
|
||||
#./Vcache_simX -E -a rv32i --core ../../runtime/mains/hello/hello.hex -s -b 1> emulator.debug
|
||||
./Vcache_simX -E -a rv32i --core ../../runtime/mains/nativevecadd/vx_pocl_main.hex -s -b 1> emulator.debug
|
||||
./Vcache_simX -E -a rv32i --core ../../runtime/mains/simple/vx_simple_main.hex -s -b 1> emulator.debug
|
||||
./Vcache_simX -E -a rv32i --core ../../runtime/mains/vecadd/vx_pocl_main.hex -s -b 1> emulator.debug
|
||||
=======
|
||||
#./Vcache_simX -E -a rv32i --core ../runtime/tests/dev/vx_dev_main.hex -s -b 1> emulator.debug
|
||||
#./Vcache_simX -E -a rv32i --core ../runtime/tests/hello/hello.hex -s -b 1> emulator.debug
|
||||
./Vcache_simX -E -a rv32i --core ../runtime/tests/nativevecadd/vx_pocl_main.hex -s -b 1> emulator.debug
|
||||
./Vcache_simX -E -a rv32i --core ../runtime/tests/simple/vx_simple_main.hex -s -b 1> emulator.debug
|
||||
./Vcache_simX -E -a rv32i --core ../runtime/tests/vecadd/vx_pocl_main.hex -s -b 1> emulator.debug
|
||||
>>>>>>> fpga_synthesis
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue