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minor update

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This commit is contained in:
Blaise Tine 2024-08-03 17:08:16 -07:00
parent 4b6a48c716
commit cb1e49d3f6
5 changed files with 6 additions and 6 deletions
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2
hw/rtl/fpu/VX_fpu_cvt.sv
View file

@ -64,7 +64,7 @@ module VX_fpu_cvt import VX_fpu_pkg::*; #(
.DATA_OUT_WIDTH(`FP_FLAGS_BITS + 32),
.TAG_WIDTH (NUM_LANES + TAG_WIDTH),
.PE_REG (0),
.OUT_BUF ((`FCVT_PE_RATIO > 2) ? 1 : 0)
.OUT_BUF (((NUM_LANES / NUM_PES) > 2) ? 1 : 0)
) pe_serializer (
.clk (clk),
.reset (reset),

2
hw/rtl/fpu/VX_fpu_div.sv
View file

@ -68,7 +68,7 @@ module VX_fpu_div import VX_fpu_pkg::*; #(
.DATA_OUT_WIDTH(`FP_FLAGS_BITS + 32),
.TAG_WIDTH (NUM_LANES + TAG_WIDTH),
.PE_REG (0),
.OUT_BUF ((`FDIV_PE_RATIO > 2) ? 1 : 0)
.OUT_BUF (((NUM_LANES / NUM_PES) > 2) ? 1 : 0)
) pe_serializer (
.clk (clk),
.reset (reset),

4
hw/rtl/fpu/VX_fpu_fma.sv
View file

@ -98,8 +98,8 @@ module VX_fpu_fma import VX_fpu_pkg::*; #(
.DATA_IN_WIDTH(3*32),
.DATA_OUT_WIDTH(`FP_FLAGS_BITS + 32),
.TAG_WIDTH (NUM_LANES + TAG_WIDTH),
.PE_REG ((`FMA_PE_RATIO != 1) ? 1 : 0),
.OUT_BUF ((`FMA_PE_RATIO > 2) ? 1 : 0)
.PE_REG ((NUM_LANES != NUM_PES) ? 1 : 0), // must be registered for DSPs
.OUT_BUF (((NUM_LANES / NUM_PES) > 2) ? 1 : 0)
) pe_serializer (
.clk (clk),
.reset (reset),

2
hw/rtl/fpu/VX_fpu_ncp.sv
View file

@ -69,7 +69,7 @@ module VX_fpu_ncp import VX_fpu_pkg::*; #(
.DATA_OUT_WIDTH(`FP_FLAGS_BITS + 32),
.TAG_WIDTH (NUM_LANES + TAG_WIDTH),
.PE_REG (0),
.OUT_BUF ((`FNCP_PE_RATIO > 2) ? 1 : 0)
.OUT_BUF (((NUM_LANES / NUM_PES) > 2) ? 1 : 0)
) pe_serializer (
.clk (clk),
.reset (reset),

2
hw/rtl/fpu/VX_fpu_sqrt.sv
View file

@ -62,7 +62,7 @@ module VX_fpu_sqrt import VX_fpu_pkg::*; #(
.DATA_OUT_WIDTH(`FP_FLAGS_BITS + 32),
.TAG_WIDTH (NUM_LANES + TAG_WIDTH),
.PE_REG (0),
.OUT_BUF ((`FSQRT_PE_RATIO > 2) ? 1 : 0)
.OUT_BUF (((NUM_LANES / NUM_PES) > 2) ? 1 : 0)
) pe_serializer (
.clk (clk),
.reset (reset),