github-mirrors/vortex
1
0
Fork 0
mirror of https://github.com/vortexgpgpu/vortex.git synced 2025-04-23 21:39:10 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions

update the code accessing registers in obsoleted way

Browse source
This commit is contained in:
jaewon-lee-github 2024-10-02 14:16:57 -04:00
parent 4a606061d2
commit d1175a03c9
3 changed files with 7 additions and 3 deletions
Download patch file Download diff file Expand all files Collapse all files

2
sim/simx/emulator.cpp
View file

@ -74,11 +74,11 @@ Emulator::Emulator(const Arch &arch, const DCRS &dcrs, Core* core)
, core_(core)
, warps_(arch.num_warps(), arch)
, barriers_(arch.num_barriers(), 0)
, ipdom_size_(arch.num_threads()-1)
// [TBC] Currently, tradeoff between scratchpad size & performance has not been evaluated. Scratchpad is
// considered to be big enough to hold input tiles for one output tile.
// In future versions, scratchpad size should be fixed to an appropriate value.
, scratchpad(std::vector<Word>(32 * 32 * 32768))
, ipdom_size_(arch.num_threads()-1)
{
this->clear();
}

2
sim/simx/execute.cpp
View file

@ -1473,7 +1473,7 @@ void Emulator::execute(const Instr &instr, uint32_t wid, instr_trace_t *trace) {
trace->fu_type = FUType::LSU;
trace->lsu_type = LsuType::TCU_LOAD;
trace->used_iregs.set(rsrc0);
trace->src_regs[0] = {RegType::Integer, rsrc0};
auto trace_data = std::make_shared<LsuTraceData>(num_threads);
trace->data = trace_data;

6
sim/simx/func_unit.cpp
View file

@ -222,7 +222,10 @@ void LsuUnit::tick() {
input.pop();
}
}
///////// TENSOR code TBC ////////////////////////////////
/* TO BE FIXED:Tensor_core code
send_request is not used anymore. Need to be modified number of load
*/
/*
int LsuUnit::send_requests(instr_trace_t* trace, int block_idx, int tag) {
int count = 0;
@ -275,6 +278,7 @@ int LsuUnit::send_requests(instr_trace_t* trace, int block_idx, int tag) {
}
return count;
}
*/
///////////////////////////////////////////////////////////////////////////////