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sij814 2024-08-15 19:40:52 -07:00
parent ea34239b43
commit d7e8fd74ff
1 changed files with 1 additions and 1 deletions
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2
sim/simx/mem_sim.cpp
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@ -77,7 +77,7 @@ public:
if (!rsp_args->request.write) {
MemRsp mem_rsp{rsp_args->request.tag, rsp_args->request.cid, rsp_args->request.uuid};
rsp_args->simobject->MemRspPorts.at(rsp_args->i).push(mem_rsp, 1);
DT(3, rsp_args->simobject->name() << " mem-rsp: " << mem_rsp);
DT(3, rsp_args->simobject->name() << " mem-rsp: " << mem_rsp << " bank: " << rsp_args->i);
}
delete rsp_args;
},