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stream pack optimization

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This commit is contained in:
Blaise Tine 2024-07-22 19:35:40 -07:00
parent d85661420b
commit e7b2bb81b4
1 changed files with 21 additions and 23 deletions
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44
hw/rtl/libs/VX_stream_pack.sv
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@ -38,11 +38,9 @@ module VX_stream_pack #(
output wire [TAG_WIDTH-1:0] tag_out,
input wire ready_out
);
localparam LOG_NUM_REQS = `CLOG2(NUM_REQS);
if (NUM_REQS > 1) begin
wire [LOG_NUM_REQS-1:0] grant_index;
wire [NUM_REQS-1:0] grant_onehot;
wire grant_valid;
wire grant_ready;
@ -54,29 +52,31 @@ module VX_stream_pack #(
.reset (reset),
.requests (valid_in),
.grant_valid (grant_valid),
.grant_index (grant_index),
`UNUSED_PIN (grant_onehot),
`UNUSED_PIN (grant_index),
.grant_onehot(grant_onehot),
.grant_ready (grant_ready)
);
reg [NUM_REQS-1:0] valid_sel;
reg [NUM_REQS-1:0] ready_sel;
wire ready_unqual;
wire [TAG_WIDTH-1:0] tag_sel;
wire [TAG_WIDTH-1:0] tag_sel = tag_in[grant_index];
VX_onehot_mux #(
.DATAW (TAG_WIDTH),
.N (NUM_REQS)
) onehot_mux (
.data_in (tag_in),
.sel_in (grant_onehot),
.data_out (tag_sel)
);
always @(*) begin
valid_sel = '0;
ready_sel = '0;
for (integer i = 0; i < NUM_REQS; ++i) begin
if (tag_in[i][TAG_SEL_BITS-1:0] == tag_sel[TAG_SEL_BITS-1:0]) begin
valid_sel[i] = valid_in[i];
ready_sel[i] = ready_unqual;
end
end
wire [NUM_REQS-1:0] mask_sel;
for (genvar i = 0; i < NUM_REQS; ++i) begin
assign mask_sel[i] = valid_in[i] && (tag_in[i][TAG_SEL_BITS-1:0] == tag_sel[TAG_SEL_BITS-1:0]);
end
assign grant_ready = ready_unqual;
for (genvar i = 0; i < NUM_REQS; ++i) begin
assign ready_in[i] = grant_ready & mask_sel[i];
end
VX_elastic_buffer #(
.DATAW (NUM_REQS + TAG_WIDTH + (NUM_REQS * DATA_WIDTH)),
@ -86,15 +86,13 @@ module VX_stream_pack #(
.clk (clk),
.reset (reset),
.valid_in (grant_valid),
.data_in ({valid_sel, tag_sel, data_in}),
.ready_in (ready_unqual),
.data_in ({mask_sel, tag_sel, data_in}),
.ready_in (grant_ready),
.valid_out (valid_out),
.data_out ({mask_out, tag_out, data_out}),
.ready_out (ready_out)
);
assign ready_in = ready_sel;
end else begin
`UNUSED_VAR (clk)