mirror of
https://github.com/vortexgpgpu/vortex.git
synced 2025-04-22 21:09:15 -04:00
More 64b fixes in ALU, Verilator exit code and ISA tests
This commit is contained in:
parent
f454210127
commit
e8cc55f8ae
5 changed files with 198 additions and 13 deletions
|
@ -6,15 +6,160 @@ set -e
|
|||
# ensure build
|
||||
make -s
|
||||
|
||||
unittest()
|
||||
{
|
||||
make -C tests/unittest run
|
||||
}
|
||||
|
||||
coverage()
|
||||
{
|
||||
echo "begin coverage tests..."
|
||||
echo "begin coverage tests..."
|
||||
|
||||
make -C sim/simx clean
|
||||
XLEN=64 make -C sim/simx
|
||||
XLEN=64 make -C tests/riscv/isa run-simx
|
||||
#make -C sim/simx clean
|
||||
#XLEN=64 make -C sim/simx
|
||||
#XLEN=64 make -C tests/runtime run-simx
|
||||
#XLEN=64 make -C tests/riscv/isa run-simx
|
||||
#XLEN=64 make -C tests/regression run-simx
|
||||
#XLEN=64 make -C tests/opencl run-simx
|
||||
#make -C . clean
|
||||
#XLEN=64 make -C .
|
||||
XLEN=64 make -C tests/riscv/isa run-rtlsim
|
||||
# XLEN=64 make -C tests/runtime run-rtlsim
|
||||
# XLEN=64 make -C tests/regression run-rtlsim
|
||||
|
||||
echo "coverage tests done!"
|
||||
echo "coverage tests done!"
|
||||
}
|
||||
|
||||
tex()
|
||||
{
|
||||
echo "begin texture tests..."
|
||||
|
||||
CONFIGS="-DEXT_TEX_ENABLE=1" ./ci/blackbox.sh --driver=vlsim --app=tex --args="XLEN=64 -isoccer.png -osoccer_result.png -g0"
|
||||
CONFIGS="-DEXT_TEX_ENABLE=1" ./ci/blackbox.sh --driver=simx --app=tex --args="XLNE=64 -isoccer.png -osoccer_result.png -g0"
|
||||
CONFIGS="-DEXT_TEX_ENABLE=1" ./ci/blackbox.sh --driver=rtlsim --app=tex --args="XLEN=64 -itoad.png -otoad_result.png -g1"
|
||||
CONFIGS="-DEXT_TEX_ENABLE=1" ./ci/blackbox.sh --driver=simx --app=tex --args="XLEN=64 -irainbow.png -orainbow_result.png -g2"
|
||||
CONFIGS="-DEXT_TEX_ENABLE=1" ./ci/blackbox.sh --driver=rtlsim --app=tex --args="XLEN=64 -itoad.png -otoad_result.png -g1" --perf
|
||||
CONFIGS="-DEXT_TEX_ENABLE=1" ./ci/blackbox.sh --driver=simx --app=tex --args="XLEN=64 -itoad.png -otoad_result.png -g1" --perf
|
||||
|
||||
echo "coverage texture done!"
|
||||
}
|
||||
|
||||
cluster()
|
||||
{
|
||||
echo "begin clustering tests..."
|
||||
|
||||
# warp/threads configurations
|
||||
./ci/blackbox.sh --driver=rtlsim --cores=1 --warps=2 --threads=8 --app=demo --args="XLEN=64"
|
||||
./ci/blackbox.sh --driver=rtlsim --cores=1 --warps=8 --threads=2 --app=demo --args="XLEN=64"
|
||||
./ci/blackbox.sh --driver=simx --cores=1 --warps=8 --threads=16 --app=demo --args="XLEN=64"
|
||||
|
||||
# cores clustering
|
||||
./ci/blackbox.sh --driver=rtlsim --cores=1 --clusters=1 --app=demo --args="XLEN=64 -n1"
|
||||
./ci/blackbox.sh --driver=rtlsim --cores=4 --clusters=1 --app=demo --args="XLEN=64 -n1"
|
||||
./ci/blackbox.sh --driver=rtlsim --cores=2 --clusters=2 --app=demo --args="XLEN=64 -n1"
|
||||
./ci/blackbox.sh --driver=simx --cores=4 --clusters=1 --app=demo --args="XLEN=64 -n1"
|
||||
./ci/blackbox.sh --driver=simx --cores=4 --clusters=2 --app=demo --args="XLEN=64 -n1"
|
||||
|
||||
# L2/L3
|
||||
./ci/blackbox.sh --driver=rtlsim --cores=2 --l2cache --app=demo --args="XLEN=64 -n1"
|
||||
./ci/blackbox.sh --driver=rtlsim --cores=2 --clusters=2 --l3cache --app=demo --args="XLEN=64 -n1"
|
||||
./ci/blackbox.sh --driver=rtlsim --cores=2 --clusters=2 --l2cache --l3cache --app=io_addr --args="XLEN=64 -n1"
|
||||
./ci/blackbox.sh --driver=simx --cores=4 --clusters=2 --l2cache --app=demo --args="XLEN=64 -n1"
|
||||
./ci/blackbox.sh --driver=simx --cores=4 --clusters=4 --l2cache --l3cache --app=demo --args="XLEN=64 -n1"
|
||||
|
||||
echo "clustering tests done!"
|
||||
}
|
||||
|
||||
debug()
|
||||
{
|
||||
echo "begin debugging tests..."
|
||||
|
||||
./ci/blackbox.sh --driver=vlsim --cores=2 --clusters=2 --l2cache --perf --app=demo --args="XLEN=64 -n1"
|
||||
./ci/blackbox.sh --driver=simx --cores=2 --clusters=2 --l2cache --perf --app=demo --args="XLEN=64 -n1"
|
||||
./ci/blackbox.sh --driver=vlsim --cores=2 --clusters=2 --l2cache --debug --app=demo --args="XLEN=64 -n1"
|
||||
./ci/blackbox.sh --driver=simx --cores=2 --clusters=2 --l2cache --debug --app=demo --args="XLEN=64 -n1"
|
||||
./ci/blackbox.sh --driver=vlsim --cores=1 --scope --app=basic --args="XLEN=64 -t0 -n1"
|
||||
|
||||
echo "debugging tests done!"
|
||||
}
|
||||
|
||||
config()
|
||||
{
|
||||
echo "begin configuration tests..."
|
||||
|
||||
# disabling M extension
|
||||
CONFIGS=-DEXT_M_DISABLE ./ci/blackbox.sh --driver=rtlsim --cores=1 --app=no_mf_ext --args="XLEN=64"
|
||||
|
||||
# disabling F extension
|
||||
CONFIGS=-DEXT_F_DISABLE ./ci/blackbox.sh --driver=rtlsim --cores=1 --app=no_mf_ext --args="XLEN=64"
|
||||
CONFIGS=-DEXT_F_DISABLE ./ci/blackbox.sh --driver=rtlsim --cores=1 --app=no_mf_ext --perf --args="XLEN=64"
|
||||
CONFIGS=-DEXT_F_DISABLE ./ci/blackbox.sh --driver=simx --cores=1 --app=no_mf_ext --perf --args="XLEN=64"
|
||||
|
||||
# disable shared memory
|
||||
CONFIGS=-DSM_ENABLE=0 ./ci/blackbox.sh --driver=rtlsim --cores=1 --app=no_smem --args="XLEN=64"
|
||||
CONFIGS=-DSM_ENABLE=0 ./ci/blackbox.sh --driver=rtlsim --cores=1 --app=no_smem --perf --args="XLEN=64"
|
||||
CONFIGS=-DSM_ENABLE=0 ./ci/blackbox.sh --driver=simx --cores=1 --app=no_smem --perf --args="XLEN=64"
|
||||
|
||||
# using Default FPU core
|
||||
FPU_CORE=FPU_DEFAULT ./ci/blackbox.sh --driver=rtlsim --cores=1 --app=dogfood --args="XLEN=64"
|
||||
|
||||
# using FPNEW FPU core
|
||||
FPU_CORE=FPU_FPNEW ./ci/blackbox.sh --driver=rtlsim --cores=1 --app=dogfood --args="XLEN=64"
|
||||
|
||||
# using AXI bus
|
||||
AXI_BUS=1 ./ci/blackbox.sh --driver=rtlsim --cores=1 --app=demo --args="XLEN=64"
|
||||
|
||||
# adjust l1 block size to match l2
|
||||
CONFIGS="-DL1_BLOCK_SIZE=64" ./ci/blackbox.sh --driver=rtlsim --cores=2 --l2cache --app=io_addr --args="XLEN=64 -n1"
|
||||
|
||||
# test cache banking
|
||||
CONFIGS="-DDNUM_BANKS=1" ./ci/blackbox.sh --driver=rtlsim --cores=1 --app=io_addr --args="XLEN=64"
|
||||
CONFIGS="-DDNUM_BANKS=2" ./ci/blackbox.sh --driver=rtlsim --cores=1 --app=io_addr --args="XLEN=64"
|
||||
CONFIGS="-DDNUM_BANKS=2" ./ci/blackbox.sh --driver=simx --cores=1 --app=io_addr --args="XLEN=64"
|
||||
|
||||
# test cache multi-porting
|
||||
CONFIGS="-DDNUM_PORTS=2" ./ci/blackbox.sh --driver=rtlsim --cores=1 --app=io_addr --args="XLEN=64"
|
||||
CONFIGS="-DDNUM_PORTS=2" ./ci/blackbox.sh --driver=rtlsim --cores=1 --app=demo --debug --args="XLEN=64 -n1"
|
||||
CONFIGS="-DL2_NUM_PORTS=2 -DDNUM_PORTS=2" ./ci/blackbox.sh --driver=rtlsim --cores=2 --l2cache --app=io_addr --args="XLEN=64"
|
||||
CONFIGS="-DL2_NUM_PORTS=4 -DDNUM_PORTS=4" ./ci/blackbox.sh --driver=rtlsim --cores=4 --l2cache --app=io_addr --args="XLEN=64"
|
||||
CONFIGS="-DL2_NUM_PORTS=4 -DDNUM_PORTS=4" ./ci/blackbox.sh --driver=simx --cores=4 --l2cache --app=io_addr --args="XLEN=64"
|
||||
|
||||
# test 128-bit MEM block
|
||||
CONFIGS=-DMEM_BLOCK_SIZE=16 ./ci/blackbox.sh --driver=vlsim --cores=1 --app=demo --args="XLEN=64"
|
||||
|
||||
# test single-bank DRAM
|
||||
CONFIGS="-DPLATFORM_PARAM_LOCAL_MEMORY_BANKS=1" ./ci/blackbox.sh --driver=vlsim --cores=1 --app=demo --args="XLEN=64"
|
||||
|
||||
# test 27-bit DRAM address
|
||||
CONFIGS="-DPLATFORM_PARAM_LOCAL_MEMORY_ADDR_WIDTH=27" ./ci/blackbox.sh --driver=vlsim --cores=1 --app=demo --args="XLEN=64"
|
||||
|
||||
echo "configuration tests done!"
|
||||
}
|
||||
|
||||
stress0()
|
||||
{
|
||||
echo "begin stress0 tests..."
|
||||
|
||||
# test verilator reset values
|
||||
CONFIGS="-DVERILATOR_RESET_VALUE=0" ./ci/blackbox.sh --driver=vlsim --cores=2 --clusters=2 --l2cache --l3cache --app=sgemm --args="XLEN=64"
|
||||
CONFIGS="-DVERILATOR_RESET_VALUE=1" ./ci/blackbox.sh --driver=vlsim --cores=2 --clusters=2 --l2cache --l3cache --app=sgemm --args="XLEN=64"
|
||||
FPU_CORE=FPU_DEFAULT CONFIGS="-DVERILATOR_RESET_VALUE=0" ./ci/blackbox.sh --driver=vlsim --cores=2 --clusters=2 --l2cache --l3cache --app=dogfood --args="XLEN=64"
|
||||
FPU_CORE=FPU_DEFAULT CONFIGS="-DVERILATOR_RESET_VALUE=1" ./ci/blackbox.sh --driver=vlsim --cores=2 --clusters=2 --l2cache --l3cache --app=dogfood --args="XLEN=64"
|
||||
CONFIGS="-DVERILATOR_RESET_VALUE=0" ./ci/blackbox.sh --driver=vlsim --cores=2 --clusters=2 --l2cache --l3cache --app=io_addr --args="XLEN=64"
|
||||
CONFIGS="-DVERILATOR_RESET_VALUE=1" ./ci/blackbox.sh --driver=vlsim --cores=2 --clusters=2 --l2cache --l3cache --app=io_addr --args="XLEN=64"
|
||||
CONFIGS="-DVERILATOR_RESET_VALUE=0" ./ci/blackbox.sh --driver=vlsim --app=printf --args="XLEN=64"
|
||||
CONFIGS="-DVERILATOR_RESET_VALUE=1" ./ci/blackbox.sh --driver=vlsim --app=printf --args="XLEN=64"
|
||||
|
||||
echo "stress0 tests done!"
|
||||
}
|
||||
|
||||
stress1()
|
||||
{
|
||||
echo "begin stress1 tests..."
|
||||
|
||||
./ci/blackbox.sh --driver=rtlsim --cores=2 --l2cache --clusters=2 --l3cache --app=sgemm --args="XLEN=64 -n256"
|
||||
|
||||
echo "stress1 tests done!"
|
||||
}
|
||||
|
||||
usage()
|
||||
|
@ -24,8 +169,34 @@ usage()
|
|||
|
||||
while [ "$1" != "" ]; do
|
||||
case $1 in
|
||||
# Passed
|
||||
-unittest ) unittest
|
||||
;;
|
||||
# Under dev
|
||||
-coverage ) coverage
|
||||
;;
|
||||
# Still failing
|
||||
-tex ) tex
|
||||
;;
|
||||
# Passed
|
||||
-cluster ) cluster
|
||||
;;
|
||||
# Passed
|
||||
-debug ) debug
|
||||
;;
|
||||
# Passed
|
||||
-config ) config
|
||||
;;
|
||||
# Passed
|
||||
-stress0 ) stress0
|
||||
;;
|
||||
# Passed
|
||||
-stress1 ) stress1
|
||||
;;
|
||||
# Passed
|
||||
-stress ) stress0
|
||||
stress1
|
||||
;;
|
||||
-all ) coverage
|
||||
;;
|
||||
-h | --help ) usage
|
||||
|
@ -35,4 +206,4 @@ while [ "$1" != "" ]; do
|
|||
exit 1
|
||||
esac
|
||||
shift
|
||||
done
|
||||
done
|
||||
|
|
|
@ -68,6 +68,11 @@ task trace_ex_op (
|
|||
`INST_ALU_AND: `TRACE(level, ("AND"));
|
||||
`INST_ALU_LUI: `TRACE(level, ("LUI"));
|
||||
`INST_ALU_AUIPC: `TRACE(level, ("AUIPC"));
|
||||
`INST_ALU_ADD_W: `TRACE(level, ("ADD_W"));
|
||||
`INST_ALU_SUB_W: `TRACE(level, ("SUB_W"));
|
||||
`INST_ALU_SLL_W: `TRACE(level, ("SLL_W"));
|
||||
`INST_ALU_SRL_W: `TRACE(level, ("SRL_W"));
|
||||
`INST_ALU_SRA_W: `TRACE(level, ("SRA_W"));
|
||||
default: `TRACE(level, ("?"));
|
||||
endcase
|
||||
end
|
||||
|
|
|
@ -116,11 +116,15 @@ module Vortex (
|
|||
`endif
|
||||
|
||||
wire sim_ebreak /* verilator public */;
|
||||
wire [`NUM_REGS-1:0][`XLEN-1:0] sim_wb_value /* verilator public */;
|
||||
wire [`NUM_REGS-1:0][31:0] sim_wb_value /* verilator public */;
|
||||
wire [`NUM_CLUSTERS-1:0] per_cluster_sim_ebreak;
|
||||
wire [`NUM_CLUSTERS-1:0][`NUM_REGS-1:0][`XLEN-1:0] per_cluster_sim_wb_value;
|
||||
assign sim_ebreak = per_cluster_sim_ebreak[0];
|
||||
assign sim_wb_value = per_cluster_sim_wb_value[0];
|
||||
// assign sim_wb_value = per_cluster_sim_wb_value[0];
|
||||
|
||||
for (genvar i = 0; i < `NUM_REGS; ++i) begin
|
||||
assign sim_wb_value[i] = per_cluster_sim_wb_value[0][i][31:0];
|
||||
end
|
||||
`UNUSED_VAR (per_cluster_sim_ebreak)
|
||||
`UNUSED_VAR (per_cluster_sim_wb_value)
|
||||
|
||||
|
|
|
@ -130,10 +130,10 @@ module VX_alu_unit #(
|
|||
wire [`NUM_THREADS-1:0][`XLEN-1:0] alu_jal_result = is_jal ? {`NUM_THREADS{`XLEN'(alu_req_if.next_PC)}} : alu_result;
|
||||
|
||||
wire [`XLEN-1:0] br_dest = add_result[alu_req_if.tid][`XLEN-1:0];
|
||||
wire [32:0] cmp_result = sub_result[alu_req_if.tid][32:0];
|
||||
wire [`XLEN:0] cmp_result = sub_result[alu_req_if.tid][`XLEN:0];
|
||||
|
||||
wire is_less = cmp_result[32];
|
||||
wire is_equal = ~(| cmp_result[31:0]);
|
||||
wire is_less = cmp_result[`XLEN];
|
||||
wire is_equal = ~(| cmp_result[`XLEN-1:0]);
|
||||
|
||||
// output
|
||||
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
XLEN ?= 32
|
||||
XLEN ?= 64
|
||||
|
||||
SIM_DIR=../../../sim
|
||||
|
||||
|
@ -44,7 +44,12 @@ run-simx-64: run-simx-32imfd run-simx-64imfd
|
|||
|
||||
run-simx: run-simx-$(XLEN)
|
||||
|
||||
run-rtlsim:
|
||||
run-rtlsim-32:
|
||||
$(foreach test, $(TESTS_32I) $(TESTS_32M) $(TESTS_32F), $(SIM_DIR)/rtlsim/rtlsim -r $(test) || exit;)
|
||||
|
||||
run-rtlsim-64:
|
||||
$(foreach test, $(TESTS_64I) $(TESTS_64M) $(TESTS_64F), $(SIM_DIR)/rtlsim/rtlsim -r $(test) || exit;)
|
||||
|
||||
run-rtlsim: run-rtlsim-$(XLEN)
|
||||
|
||||
clean:
|
Loading…
Add table
Add a link
Reference in a new issue