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minor update
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1 changed files with 42 additions and 32 deletions
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@ -6,40 +6,50 @@ source /export/fpga/bin/setup-fpga-env fpga-pac-a10
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#########################
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## Vortex Run commands ##
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#########################
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## Synthesis
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cd /driver/hw/opae
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# Configure a Quartus build area
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afu_synth_setup -s sources.txt build_fpga
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cd build_fpga
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# Run Quartus in the vLab batch queue
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qsub-synth
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# Check if the job is submitted to the queue and running. Status should be R
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qstat | grep tinebp
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# Constantly monitoring the job submitted to the queue. Stop this using Ctrl+C
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watch ‘qstat | grep tinebp’
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## Executing on FPGA
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# From the build_fpga directory acquire a fpga node
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qsub-fpga
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# Go to the directory whree qsub-synth was run above
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cd $PBS_O_WORKDIR
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# Load the image onto an FPGA
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fpgaconf vortex_afu.gbs
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# If this says Multiple ports. Then use --bus with fpgaconf. #bus info can be found by fpgainfo port
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#fpgaconf --bus 0xaf vortex_afu.gbs
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## Running the Test case
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cd /driver/opae
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make clean
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make
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# For shared library
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export LD_LIBRARY_PATH=${PWD}:$LD_LIBRARY_PATH
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# Run the program
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cd /driver/tests/basic
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make clean
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make
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./basic
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#
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# ASE build instructions
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## Synthesis
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#
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cd /driver/hw/opae
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# Configure a Quartus build area
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afu_synth_setup -s sources.txt build_fpga
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# Run Quartus in the vLab batch queue
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cd build_fpga && qsub-synth
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# check last 10 lines in build log for possible errors
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tail -n 10 ./build_fpga/build.log
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# Check if the job is submitted to the queue and running. Status should be R
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qstat | grep tinebp
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# Constantly monitoring the job submitted to the queue. Stop this using Ctrl+C
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watch ‘qstat | grep tinebp’
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#
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## Executing on FPGA
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#
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# From the build_fpga directory acquire a fpga node
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qsub-fpga
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# Go to the directory whree qsub-synth was run above
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cd $PBS_O_WORKDIR
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# Load the image onto an FPGA
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fpgaconf vortex_afu.gbs
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# If this says Multiple ports. Then use --bus with fpgaconf. #bus info can be found by fpgainfo port
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fpgaconf --bus 0xaf vortex_afu.gbs
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# Running the Test case
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cd /driver/tests/basic
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make run-fpga
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#
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## ASE build instructions
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#
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source /export/fpga/bin/setup-fpga-env fpga-pac-a10
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