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add debug level to FPGA makefile

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This commit is contained in:
Blaise Tine 2024-08-03 00:54:58 -07:00
parent fc0392e5e3
commit fce935f1c4
2 changed files with 2 additions and 2 deletions
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2
hw/syn/altera/opae/Makefile
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@ -76,7 +76,7 @@ endif
# Debugging
ifdef DEBUG
ifneq ($(TARGET), fpga)
CFLAGS += $(DBG_TRACE_FLAGS)
CFLAGS += -DDEBUG_LEVEL=$(DEBUG) $(DBG_TRACE_FLAGS)
else
CFLAGS += -DNDEBUG
endif

2
hw/syn/xilinx/xrt/Makefile
View file

@ -116,7 +116,7 @@ ifdef DEBUG
VPP_FLAGS += -g --debug.protocol all
ifneq ($(TARGET), hw)
VPP_FLAGS += --vivado.prop fileset.sim_1.xsim.elaborate.debug_level=all
CFLAGS += $(DBG_TRACE_FLAGS)
CFLAGS += -DDEBUG_LEVEL=$(DEBUG) $(DBG_TRACE_FLAGS)
else
CFLAGS += -DNDEBUG
endif