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minor update

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Blaise Tine 2024-03-02 23:16:09 -08:00
parent badb0c8300
commit fe3c712d66
1 changed files with 1 additions and 1 deletions
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ci/regression.sh
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@ -140,7 +140,7 @@ debug()
make -C tests/riscv/isa run-rtlsim-32im > run_rtlsim.log
./ci/trace_csv.py -trtlsim run_rtlsim.log -otrace_rtlsim.csv
./ci/trace_csv.py -tsimx run_simx.log -otrace_simx.csv
diff trace_rtlsim.csv trace_simx.csv
git diff --no-index trace_rtlsim.csv trace_simx.csv
# restore default prebuilt configuration
make -C sim/simx clean && make -C sim/simx > /dev/null
make -C sim/rtlsim clean && make -C sim/rtlsim > /dev/null