13 commits

Author	SHA1	Message	Date
Blaise Tine	d47cccc157	Vortex 2.0 changes: ... + Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes	2023-10-19 20:51:22 -07:00
Blaise Tine	140124b423	additional bug fixes	2022-02-05 07:42:50 -05:00
Blaise Tine	cf2a0a5f39	code refactoring	2022-02-04 00:07:24 -05:00
Santosh Srivatsan	836c777680	XLEN parameterization for simx	2022-02-03 15:19:31 -05:00
Santosh Srivatsan	a73f656d06	Minor bug fixes	2022-01-31 17:01:14 -05:00
Santosh Srivatsan	7aa93a735d	Added FLEN parameterization for RV32/64 F and D instructions	2022-01-24 15:42:15 -05:00
Santosh Srivatsan	91c22a2592	Fixed some riscv-tests	2022-01-22 12:54:10 -05:00
Santosh Srivatsan	b1e82223ee	Renamed rv_f* functions to rvf*_s to follow the naming convention between single and double precision floating point	2021-12-13 20:37:29 -05:00
Santosh Srivatsan	5edb9098ce	Merge branch 'simx64'	2021-12-10 21:48:29 -05:00
Santosh Raghav Srivatsan	bde789b320	Added support for RV32D and RV64D instructions	2021-12-10 16:30:24 -05:00
Santosh Raghav Srivatsan	e6eda67d0c	Modified RV32F instructions to support 64-bit register file and added RV64F ISA extension	2021-12-06 18:55:13 -05:00
Blaise Tine	b995843a5b	cocogfx fixes and refactoring	2021-11-25 13:58:09 -05:00
Blaise Tine	48b2238a1f	adding rvfloats library	2021-10-10 13:26:11 -07:00