mirror of
https://github.com/vortexgpgpu/vortex.git
synced 2025-06-28 17:43:24 -04:00
166 lines
No EOL
3.8 KiB
C++
166 lines
No EOL
3.8 KiB
C++
// Copyright © 2019-2023
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef __WARP_H
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#define __WARP_H
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#include <vector>
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#include <sstream>
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#include <stack>
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#include <mem.h>
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#include "types.h"
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#include "instr.h"
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#ifdef EXT_TPU_ENABLE
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#include "tensor_unit.h"
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#endif
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#ifdef EXT_V_ENABLE
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#include "vec_unit.h"
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#endif
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namespace vortex {
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class Arch;
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class DCRS;
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class Core;
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class Instr;
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class instr_trace_t;
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struct ipdom_entry_t {
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ThreadMask orig_tmask;
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ThreadMask else_tmask;
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Word PC;
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bool fallthrough;
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ipdom_entry_t(const ThreadMask &orig_tmask, const ThreadMask &else_tmask, Word PC)
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: orig_tmask (orig_tmask)
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, else_tmask (else_tmask)
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, PC (PC)
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, fallthrough(false)
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{}
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};
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///////////////////////////////////////////////////////////////////////////////
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struct warp_t {
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std::vector<std::vector<Word>> ireg_file;
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std::vector<std::vector<uint64_t>>freg_file;
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std::stack<ipdom_entry_t> ipdom_stack;
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ThreadMask tmask;
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Word PC;
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Byte fcsr;
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uint32_t uuid;
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warp_t(uint32_t num_threads);
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void reset(uint64_t startup_addr);
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};
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///////////////////////////////////////////////////////////////////////////////
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struct wspawn_t {
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bool valid;
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uint32_t num_warps;
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Word nextPC;
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};
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///////////////////////////////////////////////////////////////////////////////
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class Emulator {
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public:
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Emulator(const Arch &arch, const DCRS &dcrs, Core* core);
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~Emulator();
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void reset();
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void attach_ram(RAM* ram);
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#ifdef VM_ENABLE
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void set_satp(uint64_t satp) ;
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#endif
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instr_trace_t* step();
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bool running() const;
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void suspend(uint32_t wid);
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void resume(uint32_t wid);
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bool barrier(uint32_t bar_id, uint32_t count, uint32_t wid);
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bool wspawn(uint32_t num_warps, Word nextPC);
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int get_exitcode() const;
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void dcache_read(void* data, uint64_t addr, uint32_t size);
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void dcache_write(const void* data, uint64_t addr, uint32_t size);
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private:
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Instr::Ptr decode(uint32_t code) const;
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void execute(const Instr &instr, uint32_t wid, instr_trace_t *trace);
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void icache_read(void* data, uint64_t addr, uint32_t size);
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void dcache_amo_reserve(uint64_t addr);
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bool dcache_amo_check(uint64_t addr);
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void writeToStdOut(const void* data, uint64_t addr, uint32_t size);
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void cout_flush();
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Word get_csr(uint32_t addr, uint32_t wid, uint32_t tid);
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void set_csr(uint32_t addr, Word value, uint32_t wid, uint32_t tid);
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uint32_t get_fpu_rm(uint32_t funct3, uint32_t wid, uint32_t tid);
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void update_fcrs(uint32_t fflags, uint32_t wid, uint32_t tid);
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// temporarily added for riscv-vector tests
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// TODO: remove once ecall/ebreak are supported
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void trigger_ecall();
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void trigger_ebreak();
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const Arch& arch_;
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const DCRS& dcrs_;
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Core* core_;
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std::vector<warp_t> warps_;
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WarpMask active_warps_;
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WarpMask stalled_warps_;
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std::vector<WarpMask> barriers_;
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std::unordered_map<int, std::stringstream> print_bufs_;
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MemoryUnit mmu_;
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uint32_t ipdom_size_;
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Word csr_mscratch_;
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wspawn_t wspawn_;
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#ifdef EXT_TPU_ENABLE
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TensorUnit::Ptr tensor_unit_;
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#endif
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#ifdef EXT_V_ENABLE
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VecUnit::Ptr vec_unit_;
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#endif
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PoolAllocator<Instr, 64> instr_pool_;
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};
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}
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#endif |