mirror of
https://github.com/vortexgpgpu/vortex.git
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285 lines
7.5 KiB
C++
285 lines
7.5 KiB
C++
/*******************************************************************************
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HARPtools by Chad D. Kersey, Summer 2011
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*******************************************************************************/
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#include <fstream>
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#include <iostream>
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#include <iomanip>
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#include <string>
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#include <vector>
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#include <stdlib.h>
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// #include <pthread.h>
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#include "include/debug.h"
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#include "include/types.h"
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#include "include/util.h"
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#include "include/mem.h"
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#include "include/core.h"
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using namespace std;
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using namespace Harp;
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RamMemDevice::RamMemDevice(const char *filename, Size wordSize) :
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wordSize(wordSize), contents()
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{
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ifstream input(filename);
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if (!input) {
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cout << "Error reading file \"" << filename << "\" into RamMemDevice.\n";
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std::abort();
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}
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do { contents.push_back(input.get()); } while (input);
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while (contents.size() % wordSize) contents.push_back(0x00);
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}
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RamMemDevice::RamMemDevice(Size size, Size wordSize) :
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wordSize(wordSize), contents(size) {}
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void RomMemDevice::write(Addr, Word) {
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cout << "Attempt to write to ROM.\n";
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std::abort();
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}
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Word RamMemDevice::read(Addr addr) {
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D(2, "RAM read, addr=0x" << hex << addr);
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Word w = readWord(contents, addr, wordSize - addr%wordSize);
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return w;
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}
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void RamMemDevice::write(Addr addr, Word w) {
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D(2, "RAM write, addr=0x" << hex << addr);
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writeWord(contents, addr, wordSize - addr%wordSize, w);
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}
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MemDevice &MemoryUnit::ADecoder::doLookup(Addr a, Size &bit) {
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if (range == 0 || (a&((1ll<<bit)-1)) >= range) {
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ADecoder *p(((a>>bit)&1)?oneChild:zeroChild);
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if (p) { bit--; return p->doLookup(a, bit); }
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else {cout << "lookup of 0x" << hex << a << " failed.\n";
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throw BadAddress();}
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} else {
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return *md;
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}
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}
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void MemoryUnit::ADecoder::map(Addr a, MemDevice &m, Size r, Size bit)
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{
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if ((1llu << bit) <= r) {
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md = &m;
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range = m.size();
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} else {
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ADecoder *&child(((a>>bit)&1)?oneChild:zeroChild);
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if (!child) child = new ADecoder();
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child->map(a, m, r, bit-1);
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}
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}
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Byte *MemoryUnit::ADecoder::getPtr(Addr a, Size sz, Size wordSize) {
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Size bit = wordSize - 1;
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MemDevice &m(doLookup(a, bit));
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a &= (2<<bit)-1;
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if (a + sz <= m.size()) return m.base() + a;
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return NULL;
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}
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Word MemoryUnit::ADecoder::read(Addr a, bool sup, Size wordSize) {
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Size bit = wordSize - 1;
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MemDevice &m(doLookup(a, bit));
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a &= (2<<bit)-1;
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// std::cout << std::hex << "ADecoder::read(Addr " << a << ", sup " << sup << ", wordSize " << wordSize << " -> ";
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// std::cout << "Data: " << m.read(a) << "\n";
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return m.read(a);
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}
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void MemoryUnit::ADecoder::write(Addr a, Word w, bool sup, Size wordSize) {
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Size bit = wordSize - 1;
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MemDevice &m(doLookup(a, bit));
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RAM & r = (RAM &) m;
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// a &= (2<<bit)-1;
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// std::cout << std::hex << "ADecoder::write(Addr " << a << ", w " << w << ", sup " << sup << ", wordSize " << wordSize << "\n";
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Word before = m.read(a);
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Word new_word = w;
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// if (a == 0x00010000)
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// {
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// fprintf(stderr, "%c", w);
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// }
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if (wordSize == 8)
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{
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r.writeByte(a, &w);
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}
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else if (wordSize == 16)
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{
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r.writeHalf(a, &w);
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}
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else
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{
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r.writeWord(a, &w);
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}
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// m.write(a, new_word);
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}
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Byte *MemoryUnit::getPtr(Addr a, Size s) {
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return ad.getPtr(a, s, addrBytes*8);
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}
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void MemoryUnit::attach(MemDevice &m, Addr base) {
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ad.map(base, m, m.size(), addrBytes*8 - 1);
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}
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MemoryUnit::TLBEntry MemoryUnit::tlbLookup(Addr vAddr, Word flagMask) {
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map<Addr, MemoryUnit::TLBEntry>::iterator i;
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if ((i = tlb.find(vAddr/pageSize)) != tlb.end()) {
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TLBEntry &t = i->second;
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if (t.flags & flagMask) return t;
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else {
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D(2, "Page fault on addr 0x" << hex << vAddr << "(bad flags)");
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throw PageFault(vAddr, false);
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}
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} else {
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D(2, "Page fault on addr 0x" << hex << vAddr << "(not in TLB)");
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throw PageFault(vAddr, true);
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}
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}
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#ifdef EMU_INSTRUMENTATION
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Addr MemoryUnit::virtToPhys(Addr vAddr) {
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TLBEntry t = tlbLookup(vAddr, 077);
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return t.pfn*pageSize + vAddr%pageSize;
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}
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#endif
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Word MemoryUnit::read(Addr vAddr, bool sup) {
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Addr pAddr;
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if (disableVm) {
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pAddr = vAddr;
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} else {
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Word flagMask = sup?8:1;
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TLBEntry t = tlbLookup(vAddr, flagMask);
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pAddr = t.pfn*pageSize + vAddr%pageSize;
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}
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// std::cout << "MU::write: About to read: " << std::hex << pAddr << " = " << (ad.read(pAddr, sup, 8*addrBytes)) << " with " << std::dec << (8*addrBytes) << "\n";
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return ad.read(pAddr, sup, 8*addrBytes);
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}
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Word MemoryUnit::fetch(Addr vAddr, bool sup) {
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Addr pAddr;
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if (disableVm) {
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pAddr = vAddr;
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} else {
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Word flagMask = sup?32:4;
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TLBEntry t = tlbLookup(vAddr, flagMask);
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pAddr = t.pfn*pageSize + vAddr%pageSize;
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}
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Word instruction = ad.read(pAddr, sup, 8*addrBytes);
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return instruction;
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}
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void MemoryUnit::write(Addr vAddr, Word w, bool sup, Size bytes) {
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Addr pAddr;
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if (disableVm) {
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pAddr = vAddr;
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} else {
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Word flagMask = sup?16:2;
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TLBEntry t = tlbLookup(vAddr, flagMask);
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pAddr = t.pfn*pageSize + vAddr%pageSize;
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}
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// std::cout << "MU::write: About to write: " << std::hex << pAddr << " = " << w << " with " << std::dec << 8*bytes << "\n";
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ad.write(pAddr, w, sup, 8*bytes);
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// std::cout << std::hex << "reading same address: " << (this->read(vAddr, sup)) << "\n";
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}
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void MemoryUnit::tlbAdd(Addr virt, Addr phys, Word flags) {
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D(1, "tlbAdd(0x" << hex << virt << ", 0x" << phys << ", 0x" << flags << ')');
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tlb[virt/pageSize] = TLBEntry(phys/pageSize, flags);
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}
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void MemoryUnit::tlbRm(Addr va) {
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if (tlb.find(va/pageSize) != tlb.end()) tlb.erase(tlb.find(va/pageSize));
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}
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void *Harp::consoleInputThread(void* arg_vp) {
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// ConsoleMemDevice *arg = (ConsoleMemDevice *)arg_vp;
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// char c;
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// while (cin) {
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// c = cin.get();
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// pthread_mutex_lock(&arg->cBufLock);
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// arg->cBuf.push(c);
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// pthread_mutex_unlock(&arg->cBufLock);
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// }
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// cout << "Console input ended. Exiting.\n";
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// exit(4);
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return nullptr;
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}
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// ConsoleMemDevice::ConsoleMemDevice(Size wS, std::ostream &o, Core &core,
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// bool batch) :
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// wordSize(wS), output(o), core(core), cBuf()
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// {
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// // Create a console input thread if we are running in interactive mode.
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// if (!batch) {
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// pthread_t *thread = new pthread_t;
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// pthread_create(thread, NULL, consoleInputThread, (void*)this);
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// }
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// pthread_mutex_init(&cBufLock, NULL);
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// }
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// void ConsoleMemDevice::poll() {
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// pthread_mutex_lock(&cBufLock);
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// if (!cBuf.empty()) core.interrupt(8);
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// pthread_mutex_unlock(&cBufLock);
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// }
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Word DiskControllerMemDevice::read(Addr a) {
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switch (a/8) {
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case 0: return curDisk;
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case 1: return curBlock;
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case 2: return disks[curDisk].blocks * blockSize;
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case 3: return physAddr;
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case 4: return command;
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case 5: return status;
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default:
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cout << "Attempt to read invalid disk controller register.\n";
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std::abort();
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}
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}
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void DiskControllerMemDevice::write(Addr a, Word w) {
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switch (a/8) {
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case 0: if (w <= disks.size()) {
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curDisk = w;
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status = OK;
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} else {
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status = INVALID_DISK;
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}
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break;
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case 1: if (w < disks[curDisk].blocks) {
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curBlock = w;
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} else {
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status = INVALID_BLOCK;
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}
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break;
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case 2: nBlocks = w >= disks[curDisk].blocks?disks[curDisk].blocks - 1 : w;
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status = OK;
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break;
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case 3: physAddr = w;
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status = OK;
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break;
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case 4: if (w == 0) {
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} else {
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}
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cout << "TODO: Implement disk read and write!\n";
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break;
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}
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}
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