mirror of
https://github.com/vortexgpgpu/vortex.git
synced 2025-04-24 22:07:41 -04:00
405 lines
10 KiB
C++
405 lines
10 KiB
C++
// C++ libraries
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#include <utility>
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#include <iostream>
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#include <map>
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#include <iterator>
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#include <iomanip>
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#include <fstream>
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#include <unistd.h>
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#include <vector>
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#include <math.h>
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#include <algorithm>
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#include "VX_define.h"
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#include "ram.h"
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#include "VVortex_SOC.h"
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#include "verilated.h"
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#include "tb_debug.h"
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#ifdef VCD_OUTPUT
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#include <verilated_vcd_c.h>
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#endif
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unsigned long time_stamp = 0;
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double sc_time_stamp()
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{
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return time_stamp / 1000.0;
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}
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typedef struct
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{
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int cycles_left;
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int data_length;
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unsigned base_addr;
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unsigned * data;
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} dram_req_t;
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class Vortex
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{
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public:
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Vortex();
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~Vortex();
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bool simulate(std::string);
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private:
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void ProcessFile(void);
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void print_stats(bool = true);
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bool ibus_driver();
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bool dbus_driver();
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void io_handler();
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RAM ram;
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VVortex_SOC * vortex;
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unsigned start_pc;
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bool refill_d;
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unsigned refill_addr_d;
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bool refill_i;
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unsigned refill_addr_i;
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long int curr_cycle;
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bool stop;
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bool unit_test;
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std::string instruction_file_name;
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std::ofstream results;
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int stats_static_inst;
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int stats_dynamic_inst;
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int stats_total_cycles;
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int stats_fwd_stalls;
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int stats_branch_stalls;
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int debug_state;
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int ibus_state;
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int dbus_state;
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int debug_return;
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int debug_wait_num;
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int debug_inst_num;
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int debug_end_wait;
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int debug_debugAddr;
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double stats_sim_time;
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std::vector<dram_req_t> dram_req_vec;
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#ifdef VCD_OUTPUT
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VerilatedVcdC *m_trace;
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#endif
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};
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Vortex::Vortex() : start_pc(0), curr_cycle(0), stop(true), unit_test(true), stats_static_inst(0), stats_dynamic_inst(-1),
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stats_total_cycles(0), stats_fwd_stalls(0), stats_branch_stalls(0),
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debug_state(0), ibus_state(0), dbus_state(0), debug_return(0),
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debug_wait_num(0), debug_inst_num(0), debug_end_wait(0), debug_debugAddr(0)
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{
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this->vortex = new VVortex_SOC;
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#ifdef VCD_OUTPUT
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this->m_trace = new VerilatedVcdC;
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this->vortex->trace(m_trace, 99);
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this->m_trace->open("trace.vcd");
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#endif
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this->results.open("../results.txt");
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}
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Vortex::~Vortex()
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{
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#ifdef VCD_OUTPUT
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m_trace->close();
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#endif
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this->results.close();
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delete this->vortex;
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}
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void Vortex::ProcessFile(void)
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{
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loadHexImpl(this->instruction_file_name.c_str(), &this->ram);
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}
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void Vortex::print_stats(bool cycle_test)
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{
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if (cycle_test)
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{
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this->results << std::left;
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// this->results << "# Static Instructions:\t" << std::dec << this->stats_static_inst << std::endl;
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this->results << std::setw(24) << "# Dynamic Instructions:" << std::dec << this->stats_dynamic_inst << std::endl;
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this->results << std::setw(24) << "# of total cycles:" << std::dec << this->stats_total_cycles << std::endl;
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this->results << std::setw(24) << "# of forwarding stalls:" << std::dec << this->stats_fwd_stalls << std::endl;
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this->results << std::setw(24) << "# of branch stalls:" << std::dec << this->stats_branch_stalls << std::endl;
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this->results << std::setw(24) << "# CPI:" << std::dec << (double) this->stats_total_cycles / (double) this->stats_dynamic_inst << std::endl;
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this->results << std::setw(24) << "# time to simulate: " << std::dec << this->stats_sim_time << " milliseconds" << std::endl;
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}
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else
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{
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this->results << std::left;
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this->results << std::setw(24) << "# of total cycles:" << std::dec << this->stats_total_cycles << std::endl;
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this->results << std::setw(24) << "# time to simulate: " << std::dec << this->stats_sim_time << " milliseconds" << std::endl;
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}
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uint32_t status;
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ram.getWord(0, &status);
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if (this->unit_test)
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{
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if (status == 1)
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{
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this->results << std::setw(24) << "# GRADE:" << "PASSING\n";
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} else
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{
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this->results << std::setw(24) << "# GRADE:" << "Failed on test: " << status << "\n";
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}
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}
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else
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{
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this->results << std::setw(24) << "# GRADE:" << "N/A [NOT A UNIT TEST]\n";
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}
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this->stats_static_inst = 0;
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this->stats_dynamic_inst = -1;
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this->stats_total_cycles = 0;
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this->stats_fwd_stalls = 0;
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this->stats_branch_stalls = 0;
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}
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bool Vortex::ibus_driver()
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{
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return false;
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}
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void Vortex::io_handler()
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{
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// std::cout << "Checking\n";
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for (int c = 0; c < vortex->number_cores; c++)
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{
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if (vortex->io_valid[c])
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{
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uint32_t data_write = (uint32_t) vortex->io_data[c];
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// std::cout << "IO VALID!\n";
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char c = (char) data_write;
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std::cerr << c;
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// std::cout << c;
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std::cout << std::flush;
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}
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}
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}
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bool Vortex::dbus_driver()
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{
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// Iterate through each element, and get pop index
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int dequeue_index = -1;
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bool dequeue_valid = false;
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for (int i = 0; i < this->dram_req_vec.size(); i++)
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{
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if (this->dram_req_vec[i].cycles_left > 0)
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{
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this->dram_req_vec[i].cycles_left -= 1;
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}
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if ((this->dram_req_vec[i].cycles_left == 0) && (!dequeue_valid))
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{
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dequeue_index = i;
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dequeue_valid = true;
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}
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}
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if (vortex->dram_req)
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{
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if (vortex->dram_req_read)
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{
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// Need to add an element
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dram_req_t dram_req;
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dram_req.cycles_left = vortex->dram_expected_lat;
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dram_req.data_length = vortex->dram_req_size / 4;
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dram_req.base_addr = vortex->dram_req_addr;
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dram_req.data = (unsigned *) malloc(dram_req.data_length * sizeof(unsigned));
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for (int i = 0; i < dram_req.data_length; i++)
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{
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unsigned curr_addr = dram_req.base_addr + (i*4);
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unsigned data_rd;
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ram.getWord(curr_addr, &data_rd);
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dram_req.data[i] = data_rd;
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}
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// std::cout << "Fill Req -> Addr: " << std::hex << dram_req.base_addr << std::dec << "\n";
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this->dram_req_vec.push_back(dram_req);
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}
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if (vortex->dram_req_write)
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{
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unsigned base_addr = vortex->dram_req_addr;
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unsigned data_length = vortex->dram_req_size / 4;
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for (int i = 0; i < data_length; i++)
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{
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unsigned curr_addr = base_addr + (i*4);
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unsigned data_wr = vortex->dram_req_data[i];
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ram.writeWord(curr_addr, &data_wr);
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}
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}
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}
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if (vortex->dram_fill_accept && dequeue_valid)
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{
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vortex->dram_fill_rsp = 1;
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vortex->dram_fill_rsp_addr = this->dram_req_vec[dequeue_index].base_addr;
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// std::cout << "Fill Rsp -> Addr: " << std::hex << (this->dram_req_vec[dequeue_index].base_addr) << std::dec << "\n";
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for (int i = 0; i < this->dram_req_vec[dequeue_index].data_length; i++)
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{
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vortex->dram_fill_rsp_data[i] = this->dram_req_vec[dequeue_index].data[i];
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}
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free(this->dram_req_vec[dequeue_index].data);
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this->dram_req_vec.erase(this->dram_req_vec.begin() + dequeue_index);
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}
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else
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{
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vortex->dram_fill_rsp = 0;
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vortex->dram_fill_rsp_addr = 0;
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}
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return false;
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}
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bool Vortex::simulate(std::string file_to_simulate)
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{
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this->instruction_file_name = file_to_simulate;
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// this->results << "\n****************\t" << file_to_simulate << "\t****************\n";
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this->ProcessFile();
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// auto start_time = std::chrono::high_resolution_clock::now();
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static bool stop = false;
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static int counter = 0;
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counter = 0;
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stop = false;
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// auto start_time = clock();
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// vortex->reset = 1;
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// vortex->reset = 0;
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unsigned curr_inst;
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unsigned new_PC;
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// while (this->stop && (!(stop && (counter > 5))))
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// {
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// // std::cout << "************* Cycle: " << cycle << "\n";
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// bool istop = ibus_driver();
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// bool dstop = !dbus_driver();
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// vortex->clk = 1;
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// vortex->eval();
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// vortex->clk = 0;
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// vortex->eval();
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// stop = istop && dstop;
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// if (stop)
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// {
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// counter++;
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// } else
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// {
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// counter = 0;
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// }
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// cycle++;
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// }
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bool istop;
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bool dstop;
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bool cont = false;
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// for (int i = 0; i < 500; i++)
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vortex->reset = 1;
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vortex->clk = 0;
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vortex->eval();
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// m_trace->dump(10);
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vortex->reset = 1;
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vortex->clk = 1;
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vortex->eval();
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// m_trace->dump(11);
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vortex->reset = 0;
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vortex->clk = 0;
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// unsigned cycles;
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counter = 0;
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this->stats_total_cycles = 12;
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while (this->stop && ((counter < 5)))
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// while (this->stats_total_cycles < 10)
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{
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// printf("-------------------------\n");
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// std::cout << "Counter: " << counter << "\n";
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// if ((this->stats_total_cycles) % 5000 == 0) std::cout << "************* Cycle: " << (this->stats_total_cycles) << "\n";
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// dstop = !dbus_driver();
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#ifdef VCD_OUTPUT
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m_trace->dump(2*this->stats_total_cycles);
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#endif
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vortex->clk = 1;
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vortex->eval();
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istop = ibus_driver();
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dstop = !dbus_driver();
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io_handler();
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#ifdef VCD_OUTPUT
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m_trace->dump((2*this->stats_total_cycles)+1);
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#endif
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vortex->clk = 0;
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vortex->eval();
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// stop = istop && dstop;
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stop = vortex->out_ebreak;
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if (stop || cont)
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// if (istop)
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{
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cont = true;
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counter++;
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} else
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{
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counter = 0;
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}
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++time_stamp;
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++stats_total_cycles;
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}
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std::cerr << "New Total Cycles: " << (this->stats_total_cycles) << "\n";
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int status = 0;
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// int status = (unsigned int) vortex->Vortex_SOC__DOT__vx_back_end__DOT__VX_wb__DOT__last_data_wb & 0xf;
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// std::cout << "Last wb: " << std::hex << ((unsigned int) vortex->Vortex__DOT__vx_back_end__DOT__VX_wb__DOT__last_data_wb) << "\n";
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// std::cout << "Something: " << result << '\n';
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// uint32_t status;
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// ram.getWord(0, &status);
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this->print_stats();
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return (status == 1);
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// return (1 == 1);
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}
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