github-mirrors/ReonV
1
0
Fork 0
mirror of https://github.com/lcbcFoo/ReonV.git synced 2025-04-25 05:57:06 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions

Added simple boot code and crt0

Browse source
This commit is contained in:
lcbcFoo 2018-01-18 14:48:40 -02:00
parent 31d39ca20b
commit 22c4c901b8
18 changed files with 202 additions and 580 deletions
Download patch file Download diff file Expand all files Collapse all files

197
designs/leon3-digilent-nexys4ddr/ahbrom.vhd
View file

@ -3,10 +3,11 @@
-- This file is a part of the GRLIB VHDL IP LIBRARY -- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2010 Aeroflex Gaisler -- Copyright (C) 2010 Aeroflex Gaisler
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
-- Entity: ahbrom -- Entity: ahbrom
-- File: ahbrom.vhd -- File: ahbrom.vhd
-- Author: Jiri Gaisler - Gaisler Research -- Author: Jiri Gaisler - Gaisler Research
-- Description: AHB rom. 0/1-waitstate read -- Modified Alen Bardizbanyan - Cobham Gaisler (pipelined impl.)
-- Description: AHB rom. 0/1-waitstate read
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
library ieee; library ieee;
use ieee.std_logic_1164.all; use ieee.std_logic_1164.all;
@ -14,6 +15,8 @@ library grlib;
use grlib.amba.all; use grlib.amba.all;
use grlib.stdlib.all; use grlib.stdlib.all;
use grlib.devices.all; use grlib.devices.all;
use grlib.config_types.all;
use grlib.config.all;
entity ahbrom is entity ahbrom is
generic ( generic (
@ -32,16 +35,22 @@ entity ahbrom is
end; end;
architecture rtl of ahbrom is architecture rtl of ahbrom is
constant abits : integer := 10; constant abits : integer := 5;
constant bytes : integer := 560; constant bytes : integer := 20;
constant dbits : integer := 32;
constant hconfig : ahb_config_type := ( constant hconfig : ahb_config_type := (
0 => ahb_device_reg ( VENDOR_GAISLER, GAISLER_AHBROM, 0, 0, 0), 0 => ahb_device_reg ( VENDOR_GAISLER, GAISLER_AHBROM, 0, 0, 0),
4 => ahb_membar(haddr, '1', '1', hmask), others => zero32); 4 => ahb_membar(haddr, '1', '1', hmask), others => zero32);
signal romdata : std_logic_vector(31 downto 0); signal romdata : std_logic_vector(dbits-1 downto 0);
signal romdatas : std_logic_vector(AHBDW-1 downto 0);
signal addr : std_logic_vector(abits-1 downto 2); signal addr : std_logic_vector(abits-1 downto 2);
signal hsel, hready : std_ulogic; signal hsize : std_logic_vector(2 downto 0);
signal romaddr : std_logic_vector(abits-1 downto log2(dbits/8));
signal hready, active : std_ulogic;
constant RESET_ALL : boolean := GRLIB_CONFIG_ARRAY(grlib_sync_reset_enable_all) = 1;
begin begin
@ -55,178 +64,48 @@ begin
begin begin
if rising_edge(clk) then if rising_edge(clk) then
addr <= ahbsi.haddr(abits-1 downto 2); addr <= ahbsi.haddr(abits-1 downto 2);
hsize <= ahbsi.hsize;
if RESET_ALL and rst='0' then addr <= (others => '0'); hsize <= "000"; end if;
end if; end if;
end process; end process;
p0 : if pipe = 0 generate p0 : if pipe = 0 generate
ahbso.hrdata <= ahbdrivedata(romdata); ahbso.hrdata <= romdatas;
ahbso.hready <= '1'; ahbso.hready <= '1';
hready <= '0';
end generate; end generate;
active <= ahbsi.hsel(hindex) and ahbsi.htrans(1) and ahbsi.hready;
p1 : if pipe = 1 generate p1 : if pipe = 1 generate
ahbso.hready <= hready;
reg2 : process (clk) reg2 : process (clk)
begin begin
if rising_edge(clk) then if rising_edge(clk) then
hsel <= ahbsi.hsel(hindex) and ahbsi.htrans(1); hready <= (not rst) or (not active) or (not(hready));
hready <= ahbsi.hready; ahbso.hrdata <= romdatas;
ahbso.hready <= (not rst) or (hsel and hready) or if RESET_ALL and rst='0' then hready <= '1'; ahbso.hrdata <= (others => '0'); end if;
(ahbsi.hsel(hindex) and not ahbsi.htrans(1) and ahbsi.hready);
ahbso.hrdata <= ahbdrivedata(romdata);
end if; end if;
end process; end process;
end generate; end generate;
comb : process (addr) romaddr <= addr(abits-1 downto log2(dbits/8));
romdatas <= ahbdrivedata(romdata);
comb : process (romaddr)
begin begin
case conv_integer(addr) is case conv_integer(romaddr) is
when 16#00000# => romdata <= X"81D82000"; when 16#00000# => romdata <= X"37010048";
when 16#00001# => romdata <= X"03000004"; when 16#00001# => romdata <= X"130101fe";
when 16#00002# => romdata <= X"821060E0"; when 16#00002# => romdata <= X"b7070040";
when 16#00003# => romdata <= X"81884000"; when 16#00003# => romdata <= X"e7800700";
when 16#00004# => romdata <= X"81900000"; when 16#00004# => romdata <= X"13000000";
when 16#00005# => romdata <= X"81980000"; when 16#00005# => romdata <= X"00000000";
when 16#00006# => romdata <= X"81800000";
when 16#00007# => romdata <= X"A1800000";
when 16#00008# => romdata <= X"01000000";
when 16#00009# => romdata <= X"03002040";
when 16#0000A# => romdata <= X"8210600F";
when 16#0000B# => romdata <= X"C2A00040";
when 16#0000C# => romdata <= X"84100000";
when 16#0000D# => romdata <= X"01000000";
when 16#0000E# => romdata <= X"01000000";
when 16#0000F# => romdata <= X"01000000";
when 16#00010# => romdata <= X"01000000";
when 16#00011# => romdata <= X"01000000";
when 16#00012# => romdata <= X"80108002";
when 16#00013# => romdata <= X"01000000";
when 16#00014# => romdata <= X"01000000";
when 16#00015# => romdata <= X"01000000";
when 16#00016# => romdata <= X"01000000";
when 16#00017# => romdata <= X"01000000";
when 16#00018# => romdata <= X"87444000";
when 16#00019# => romdata <= X"8608E01F";
when 16#0001A# => romdata <= X"88100000";
when 16#0001B# => romdata <= X"8A100000";
when 16#0001C# => romdata <= X"8C100000";
when 16#0001D# => romdata <= X"8E100000";
when 16#0001E# => romdata <= X"A0100000";
when 16#0001F# => romdata <= X"A2100000";
when 16#00020# => romdata <= X"A4100000";
when 16#00021# => romdata <= X"A6100000";
when 16#00022# => romdata <= X"A8100000";
when 16#00023# => romdata <= X"AA100000";
when 16#00024# => romdata <= X"AC100000";
when 16#00025# => romdata <= X"AE100000";
when 16#00026# => romdata <= X"90100000";
when 16#00027# => romdata <= X"92100000";
when 16#00028# => romdata <= X"94100000";
when 16#00029# => romdata <= X"96100000";
when 16#0002A# => romdata <= X"98100000";
when 16#0002B# => romdata <= X"9A100000";
when 16#0002C# => romdata <= X"9C100000";
when 16#0002D# => romdata <= X"9E100000";
when 16#0002E# => romdata <= X"86A0E001";
when 16#0002F# => romdata <= X"16BFFFEF";
when 16#00030# => romdata <= X"81E00000";
when 16#00031# => romdata <= X"82102002";
when 16#00032# => romdata <= X"81904000";
when 16#00033# => romdata <= X"03000004";
when 16#00034# => romdata <= X"821060E0";
when 16#00035# => romdata <= X"81884000";
when 16#00036# => romdata <= X"01000000";
when 16#00037# => romdata <= X"01000000";
when 16#00038# => romdata <= X"01000000";
when 16#00039# => romdata <= X"83480000";
when 16#0003A# => romdata <= X"8330600C";
when 16#0003B# => romdata <= X"80886001";
when 16#0003C# => romdata <= X"02800024";
when 16#0003D# => romdata <= X"01000000";
when 16#0003E# => romdata <= X"07000000";
when 16#0003F# => romdata <= X"8610E178";
when 16#00040# => romdata <= X"C108C000";
when 16#00041# => romdata <= X"C118C000";
when 16#00042# => romdata <= X"C518C000";
when 16#00043# => romdata <= X"C918C000";
when 16#00044# => romdata <= X"CD18C000";
when 16#00045# => romdata <= X"D118C000";
when 16#00046# => romdata <= X"D518C000";
when 16#00047# => romdata <= X"D918C000";
when 16#00048# => romdata <= X"DD18C000";
when 16#00049# => romdata <= X"E118C000";
when 16#0004A# => romdata <= X"E518C000";
when 16#0004B# => romdata <= X"E918C000";
when 16#0004C# => romdata <= X"ED18C000";
when 16#0004D# => romdata <= X"F118C000";
when 16#0004E# => romdata <= X"F518C000";
when 16#0004F# => romdata <= X"F918C000";
when 16#00050# => romdata <= X"FD18C000";
when 16#00051# => romdata <= X"01000000";
when 16#00052# => romdata <= X"01000000";
when 16#00053# => romdata <= X"01000000";
when 16#00054# => romdata <= X"01000000";
when 16#00055# => romdata <= X"01000000";
when 16#00056# => romdata <= X"89A00842";
when 16#00057# => romdata <= X"01000000";
when 16#00058# => romdata <= X"01000000";
when 16#00059# => romdata <= X"01000000";
when 16#0005A# => romdata <= X"01000000";
when 16#0005B# => romdata <= X"10800005";
when 16#0005C# => romdata <= X"01000000";
when 16#0005D# => romdata <= X"01000000";
when 16#0005E# => romdata <= X"00000000";
when 16#0005F# => romdata <= X"00000000";
when 16#00060# => romdata <= X"87444000";
when 16#00061# => romdata <= X"8730E01C";
when 16#00062# => romdata <= X"8688E00F";
when 16#00063# => romdata <= X"12800016";
when 16#00064# => romdata <= X"03200000";
when 16#00065# => romdata <= X"05040E00";
when 16#00066# => romdata <= X"8410A133";
when 16#00067# => romdata <= X"C4204000";
when 16#00068# => romdata <= X"0539AE05";
when 16#00069# => romdata <= X"8410A25F";
when 16#0006A# => romdata <= X"C4206004";
when 16#0006B# => romdata <= X"050003FC";
when 16#0006C# => romdata <= X"C4206008";
when 16#0006D# => romdata <= X"82103860";
when 16#0006E# => romdata <= X"C4004000";
when 16#0006F# => romdata <= X"8530A00C";
when 16#00070# => romdata <= X"03000004";
when 16#00071# => romdata <= X"82106009";
when 16#00072# => romdata <= X"80A04002";
when 16#00073# => romdata <= X"12800006";
when 16#00074# => romdata <= X"033FFC00";
when 16#00075# => romdata <= X"82106100";
when 16#00076# => romdata <= X"05248820";
when 16#00077# => romdata <= X"8410A3CD";
when 16#00078# => romdata <= X"C4204000";
when 16#00079# => romdata <= X"05000080";
when 16#0007A# => romdata <= X"82100000";
when 16#0007B# => romdata <= X"80A0E000";
when 16#0007C# => romdata <= X"02800005";
when 16#0007D# => romdata <= X"01000000";
when 16#0007E# => romdata <= X"82004002";
when 16#0007F# => romdata <= X"10BFFFFC";
when 16#00080# => romdata <= X"8620E001";
when 16#00081# => romdata <= X"3D11FFFF";
when 16#00082# => romdata <= X"BC17A3E0";
when 16#00083# => romdata <= X"BC278001";
when 16#00084# => romdata <= X"9C27A060";
when 16#00085# => romdata <= X"03100000";
when 16#00086# => romdata <= X"81C04000";
when 16#00087# => romdata <= X"01000000";
when 16#00088# => romdata <= X"00000000";
when 16#00089# => romdata <= X"00000000";
when 16#0008A# => romdata <= X"00000000";
when 16#0008B# => romdata <= X"00000000";
when 16#0008C# => romdata <= X"00000000";
when others => romdata <= (others => '-'); when others => romdata <= (others => '-');
end case; end case;
end process; end process;
-- pragma translate_off -- pragma translate_off
bootmsg : report_version bootmsg : report_version
generic map ("ahbrom" & tost(hindex) & generic map ("ahbrom" & tost(hindex) &
": 32-bit AHB ROM Module, " & tost(bytes/4) & " words, " & tost(abits-2) & " address bits" ); ": 32-bit AHB ROM Module, " & tost(bytes/(dbits/8)) & " words, " & tost(abits-log2(dbits/8)) & " address bits" );
-- pragma translate_on -- pragma translate_on
end; end;

62
designs/leon3-digilent-nexys4ddr/prom.srec Executable file → Normal file
View file

@ -1,37 +1,27 @@
S00C000070726F6D2E737265635A S00600004844521B
S113000081D8200003000004821060E08188400051 S1230000130000001300000013000000130000001300000013000000130000001300000044
S1130010819000008198000081800000A180000090 S123002013000000130000001300000013000000130000003706000023200600232406008A
S113002001000000030020408210600FC2A00040C5 S12300402320060223220602232006042322060423280604232A0604232C0604232E060408
S11300308410000001000000010000000100000025 S1230060232A06041301000093010000130200009302000013030000930300001304000010
S11300400100000001000000801080020100000097 S1230080930400001305000093050000130600009306000013070000930700001308000094
S11300500100000001000000010000000100000098 S12300A0930800001309000093090000130A0000930A0000130B0000930B0000130C000054
S1130060874440008608E01F881000008A100000C2 S12300C0930C0000130D0000930D0000130E0000930E0000130F0000930F00001300000024
S11300708C1000008E100000A0100000A2100000E0 S12300E0130000001300000013000000130000001300000013000000130000001300000064
S1130080A4100000A6100000A8100000AA10000090 S1230100130000001300000013000000130000001300000013000000130000001300000043
S1130090AC100000AE1000009010000092100000A0 S1230120130000001300000013000000130000001300000013000000130000001300000023
S11300A09410000096100000981000009A100000B0 S1230140130000001300000013000000130000001300000013000000130000001300000003
S11300B09C1000009E10000086A0E00116BFFFEF18 S12301601300000013000000130000001300000013000000130000001300000013000000E3
S11300C081E00000821020028190400003000004BF S12301801300000013000000130000001300000013000000130000001300000013000000C3
S11300D0821060E0818840000100000001000000FF S12301A01300000013000000130000001300000013000000130000001300000013000000A3
S11300E001000000834800008330600C80886001B8 S12301C0130000001300000013000000130000001300000013000000B705008037063810E8
S11300F00280002401000000070000008610E1785F S12301E01306361323A0C5003716B8E61306F66523A2C50037F60F0023A4C5003706020021
S1130100C108C000C118C000C518C000C918C0008B S123020093050000B305B60037040048130404FE3304B440930500063301B440B70500404B
S1130110CD18C000D118C000D518C000D918C0002F S12302207300100013000000130000001300000000000000000000000000000000000000FE
S1130120DD18C000E118C000E518C000E918C000DF S123024000000000000000000000000000000000000000000000000000000000000000009A
S1130130ED18C000F118C000F518C000F918C0008F S123026000000000000000000000000000000000000000000000000000000000000000007A
S1130140FD18C000010000000100000001000000D3 S123028000000000000000000000000000000000000000000000000000000000000000005A
S1130150010000000100000089A008420100000025 S12302A000000000000000000000000000000000000000000000000000000000000000003A
S113016001000000010000000100000010800005F3 S12302C000000000000000000000000000000000000000000000000000000000000000001A
S11301700100000001000000000000000000000079 S12302E00000000000000000000000000000000000000000000000000000000000000000FA
S1130180874440008730E01C8688E00F1280001608 S5030018E4
S11301900320000005040E008410A133C420400095
S11301A00539AE058410A25FC4206004050003FC79
S11301B0C420600882103860C40040008530A00C60
S11301C0030000048210600980A04002128000062F
S11301D0033FFC0082106100052488208410A3CD15
S11301E0C4204000050000808210000080A0E000D0
S11301F002800005010000008200400210BFFFFCE5
S11302008620E0013D11FFFFBC17A3E0BC2780015D
S11302109C27A0600310000081C040000100000082
S113022000000000000000000000000000000000CA
S9030000FC S9030000FC

59
lib/gaisler/leon3v3/iu3.vhd
View file

@ -1492,7 +1492,7 @@ architecture rtl of iu3 is
begin begin
branch := '0'; branch := '0';
if(inst(6 downto 0) = R_BRANCH and cnt = "01") then if(inst(6 downto 0) = R_BRANCH and cnt = "11") then
case inst(14 downto 12) is case inst(14 downto 12) is
when "000" => branch := icc(2); -- beq when "000" => branch := icc(2); -- beq
when "001" => branch := not icc(2); -- bne when "001" => branch := not icc(2); -- bne
@ -1939,7 +1939,7 @@ end;
-- nobp := BPRED; -- nobp := BPRED;
when R_BRANCH => when R_BRANCH =>
if(r.d.cnt = "01") then if not(r.d.cnt = "00") then
ldcheck1 := '0'; ldcheck2 := '0'; ldcheck1 := '0'; ldcheck2 := '0';
end if; end if;
-- if r.d.cnt = "01" then -- if r.d.cnt = "01" then
@ -2059,7 +2059,7 @@ end;
end case; end case;
when R_BRANCH => when R_BRANCH =>
if r.d.cnt = "01" then if r.d.cnt = "11" then
branch := branch_true; branch := branch_true;
if (branch = '1') then if (branch = '1') then
--if (annul = '1') then --if (annul = '1') then
@ -2076,12 +2076,12 @@ end;
cnt := "11"; cnt := "11";
hold_pc := '1'; hold_pc := '1';
pv := '0'; pv := '0';
elsif r.d.cnt = "11" then elsif r.d.cnt = "01" then
cnt := "01"; cnt := "10";
hold_pc := '1'; hold_pc := '1';
pv := '0'; pv := '0';
else else
cnt := "10"; cnt := "01";
hold_pc := '1'; hold_pc := '1';
pv := '0'; pv := '0';
end if; end if;
@ -2147,41 +2147,23 @@ end;
rdo : out std_logic_vector(4 downto 0); rexen: out std_ulogic) is rdo : out std_logic_vector(4 downto 0); rexen: out std_ulogic) is
variable write_reg : std_ulogic; variable write_reg : std_ulogic;
variable op : std_logic_vector(6 downto 0); variable op : std_logic_vector(6 downto 0);
variable op2 : std_logic_vector(2 downto 0);
variable op3 : std_logic_vector(5 downto 0);
variable rd : std_logic_vector(4 downto 0); variable rd : std_logic_vector(4 downto 0);
variable vrexen: std_ulogic;
begin begin
op := inst(6 downto 0); op := inst(6 downto 0);
op2 := inst(24 downto 22);
op3 := inst(24 downto 19);
--------------------------------------------------------------------------- ---------------------------------------------------------------------------
-- Changed rd according to RISCV32I convention -- Changed rd according to RISCV32I convention
write_reg := '1'; rd := inst(11 downto 7); write_reg := '1'; rd := inst(11 downto 7);
-- Default for LEON3 signals -- Default for LEON3 signals
ld := '0'; ld := '0';
vrexen := '0'; rexen := '0';
case op is case op is
when R_ST => when R_ST | R_BRANCH =>
write_reg := '0'; write_reg := '0';
when R_LD => when R_LD =>
ld := '1'; ld := '1';
when R_BRANCH =>
write_reg := '1';
rd := (others => '0');
if(r.d.cnt = "00") then
rd := "11110";
else
rd := "11111";
end if;
when R_JAL | R_JALR => -- Save PC in rd
write_reg := '1';
when others => null; when others => null;
end case; end case;
@ -2189,12 +2171,12 @@ end;
if (rd = "00000") then if (rd = "00000") then
write_reg := '0'; write_reg := '0';
end if; end if;
wreg := write_reg; rdo := rd; rexen := vrexen; wreg := write_reg; rdo := rd;
end; end;
-- immediate data generation -- immediate data generation
function imm_data (r : registers; inst : word; de_reximmexp: std_ulogic; de_reximmval: std_logic_vector(31 downto 13)) function imm_data (r : registers; inst : word)
return word is return word is
variable immediate_data : std_logic_vector(31 downto 0); variable immediate_data : std_logic_vector(31 downto 0);
begin begin
@ -2614,6 +2596,7 @@ end;
when others => aluresult := miscout; when others => aluresult := miscout;
end case; end case;
-- Save PC on jump and link
if r.e.jmpl = '1' then aluresult := (r.e.ctrl.pc(31 downto 2) + 1) & "00"; end if; if r.e.jmpl = '1' then aluresult := (r.e.ctrl.pc(31 downto 2) + 1) & "00"; end if;
-- if(to_integer(signed(op1)) < to_integer(signed(op2))) then -- if(to_integer(signed(op1)) < to_integer(signed(op2))) then
@ -2641,15 +2624,15 @@ end;
else icco := r.w.s.icc; else icco := r.w.s.icc;
end if; end if;
if(r.e.ctrl.inst(6 downto 0) = R_BRANCH) then -- if(r.e.ctrl.inst(6 downto 0) = R_BRANCH) then
aluresult := (others => '0'); -- aluresult := (others => '0');
if r.e.ctrl.wicc = '1' then -- if r.e.ctrl.wicc = '1' then
aluresult := addout(32 downto 1); -- aluresult := addout(32 downto 1);
elsif r.m.ctrl.wicc = '1' then aluresult(3 downto 0) := me_icc; -- elsif r.m.ctrl.wicc = '1' then aluresult(3 downto 0) := me_icc;
elsif r.x.ctrl.wicc = '1' then aluresult(3 downto 0) := r.x.icc; -- elsif r.x.ctrl.wicc = '1' then aluresult(3 downto 0) := r.x.icc;
else aluresult(3 downto 0) := r.w.s.icc; -- else aluresult(3 downto 0) := r.w.s.icc;
end if; -- end if;
end if; -- end if;
--elsif r.m.ctrl.wicc = '1' then icco := me_icc; --elsif r.m.ctrl.wicc = '1' then icco := me_icc;
--elsif r.x.ctrl.wicc = '1' then icco := r.x.icc; --elsif r.x.ctrl.wicc = '1' then icco := r.x.icc;
--else icco := r.w.s.icc; end if; --else icco := r.w.s.icc; end if;
@ -3821,7 +3804,7 @@ begin
-- fpbranch(de_inst, cpo.cc, de_cbranch); -- fpbranch(de_inst, cpo.cc, de_cbranch);
-- Get immediate -- Get immediate
v.a.imm := imm_data(r, de_inst, de_reximmexp, de_reximmval); v.a.imm := imm_data(r, de_inst);
de_iperr := '0'; de_iperr := '0';
-- Generates control signals -- Generates control signals

73
riscv/Makefile
View file

@ -1,14 +1,25 @@
# Author: Lucas Castro ######################################################################
# Last modification: sep/2017
# #
# Makefile for creating a raw binary RV32I program for ReonV # Author: Lucas Castro
# Last modification: jan/2018
#
# Makefile for running programs on ReonV
#
######################################################################
#
# Update the following variables to your environment and board used
# Cross compiler (Must be RV32I only)
CROSS=../../rv32i/rv32i-gnu/bin/riscv32-unknown-elf-
# Design you are targeting
DESIGN=leon3-digilent-nexys4ddr
# Leon3 designs might use a prom.srec to load boot code.
# This is the binary to .srec converter this makefile will look for.
# In need check this one under GPL: http://www.s-record.com/
BIN2SREC=../../srec/bin2srec
#######################################################################
# Update the following variables to your environment
# to run example program
CROSS=/home/foo/IC/riscv-leon/rv32i/rv32i-gnu/bin/riscv32-unknown-elf-
#######################################################################
CC=gcc CC=gcc
AS=as AS=as
OBJCOPY=objcopy OBJCOPY=objcopy
@ -16,33 +27,41 @@ CFLAGS=-nostdlib
OBJCPFLAGS=-O binary -j .text OBJCPFLAGS=-O binary -j .text
LD_SCRIPT=ld_script LD_SCRIPT=ld_script
#####################################################################
# Target .s
%.s : %.c
${CROSS}$(CC) -S $(CFLAGS) $(CPPFLAGS) $< -o $@
#################################################################
# #
# Note that target %.hex requeries %.S, not the makefile target %.s! # Targets for Makefile
# They are different here because there are modifications needed
# on assembly code before running! (set stack, for example)
# More details on README
# #
################################################################# #####################################################################
# Compiled binary linked with reonv_crt0
%.out : %.c %.out : %.c
${CROSS}${CC} -T${LD_SCRIPT} $< -o $@ ${CROSS}${CC} -static -T${LD_SCRIPT} $< -o $@
# Target .o # Targets for .S.
# .o is for linking programs (i.e. crt0.S)
# .hex is for other assembly programs
%.hex : %.S %.hex : %.S
${CROSS}$(AS) $< -o $@ ${CROSS}$(AS) $< -o $@
# Target raw binary %.o : %.S
${CROSS}${CC} -c $< -o $@
# Target raw binary to avoid grmon2 errors saying this is not SPARC '-'
%.bin : %.out %.bin : %.out
${CROSS}$(OBJCOPY) $(OBJCPFLAGS) $< $@ ${CROSS}$(OBJCOPY) $(OBJCPFLAGS) $< $@
%.bin : %.hex
${CROSS}$(OBJCOPY) $(OBJCPFLAGS) $< $@
# Adapted PROM generation based on original leon3 script (found at ../bin)
ahbrom.vhd : ahbrom boot_code.bin
./ahbrom boot_code.bin ahbrom.vhd
bootcode : ahbrom.vhd
cp ahbrom.vhd ../designs/${DESIGN}/ahbrom.vhd -f
@echo "Generated ahbrom.vhd and placed at ../../designs/${DESIGN}"
ahbrom : ../bin/ahbrom.c
gcc ../bin/ahbrom.c -o ahbrom
clean: clean:
rm -rf *.hex *.inv *.bin *.o *.log *.jou *.str rm -rf ahbrom* *.hex *.inv *.bin *.o *.log *.jou *.str

11
riscv/boot_code.S Normal file
View file

@ -0,0 +1,11 @@
.file "boot_code.S"
.equ RAMSTART, 0x40000000
.equ RAMSIZE, 0x08000000
.text
.org 0x0
__boot_code:
#li sp,RAMSTART+RAMSIZE-32
li a5,RAMSTART
jalr a5
nop

BIN
riscv/boot_code.bin Normal file
View file

Binary file not shown.

7
riscv/ld_script
View file

@ -6,7 +6,7 @@
OUTPUT_FORMAT("elf32-littleriscv", "elf32-littleriscv", OUTPUT_FORMAT("elf32-littleriscv", "elf32-littleriscv",
"elf32-littleriscv") "elf32-littleriscv")
OUTPUT_ARCH(riscv) OUTPUT_ARCH(riscv)
ENTRY(_reonv_set_stack) ENTRY(__reonv_startup)
SEARCH_DIR("/home/foo/IC/riscv-leon/rv32i/rv32i-gnu/riscv32-unknown-elf/lib"); SEARCH_DIR("/home/foo/IC/riscv-leon/rv32i/rv32i-gnu/riscv32-unknown-elf/lib");
SECTIONS SECTIONS
{ {
@ -54,7 +54,10 @@ SECTIONS
.iplt : { *(.iplt) } .iplt : { *(.iplt) }
.text : .text :
{ {
reonv_set_stack.o /*
* Forced minimal ctr0 to be the first code
*/
reonv_crt0.o
*(.text.unlikely .text.*_unlikely .text.unlikely.*) *(.text.unlikely .text.*_unlikely .text.unlikely.*)
*(.text.exit .text.exit.*) *(.text.exit .text.exit.*)
*(.text.startup .text.startup.*) *(.text.startup .text.startup.*)

79
riscv/main.S
View file

@ -1,79 +0,0 @@
.file "teste.c"
.option nopic
.text
.align 2
.globl _start
.type _start, @function
_start:
# Need to set stack pointer!
lui sp,0x41200
add sp,sp,-32
sw ra,28(sp)
sw s0,24(sp)
add s0,sp,32
li a5,1
sw a5,-20(s0)
sw zero,-24(s0)
.L2:
li a1,4
lw a0,-20(s0)
jal ra,mul
sw a0,-20(s0)
lw a5,-24(s0)
add a5,a5,1
# Move counter to x7
mv x7,a5
sw a5,-24(s0)
lw a4,-20(s0)
li a5,4096
add a5,a5,-1597
ble a4,a5,.L2
nop
lw ra,28(sp)
lw s0,24(sp)
add sp,sp,32
###########################
# Move i to x6, since we dont have printf yet =(
mv x6,a4
# Stop processor
ebreak
###########################
jr ra
.size _start, .-_start
.align 2
.globl mul
.type mul, @function
mul:
add sp,sp,-32
sw ra,28(sp)
sw s0,24(sp)
add s0,sp,32
sw a0,-20(s0)
sw a1,-24(s0)
lw a5,-20(s0)
bnez a5,.L4
li a5,0
j .L5
.L4:
lw a5,-20(s0)
add a5,a5,-1
lw a1,-24(s0)
mv a0,a5
jal ra,mul
mv a4,a0
lw a5,-24(s0)
add a5,a4,a5
.L5:
mv a0,a5
lw ra,28(sp)
lw s0,24(sp)
add sp,sp,32
jr ra
.size mul, .-mul
.ident "GCC: (GNU) 7.1.1 20170509"

BIN
riscv/main.bin
View file

Binary file not shown.

18
riscv/main.c
View file

@ -1,18 +0,0 @@
int mul();
void _start(){
int i = 1;
int count = 0;
// Multiplies i by 4
do{
i = mul(i,4);
count++;
}while(i < 2500);
}
int mul(int i,int j){
if (i == 0)
return 0;
return mul(i - 1,j) + j;
}

63
riscv/main.s
View file

@ -1,63 +0,0 @@
.file "main.c"
.option nopic
.text
.align 2
.globl _start
.type _start, @function
_start:
addi sp,sp,-32
sw ra,28(sp)
sw s0,24(sp)
addi s0,sp,32
li a5,1
sw a5,-20(s0)
sw zero,-24(s0)
.L2:
li a1,4
lw a0,-20(s0)
call mul
sw a0,-20(s0)
lw a5,-24(s0)
addi a5,a5,1
sw a5,-24(s0)
lw a4,-20(s0)
li a5,4096
addi a5,a5,-1597
ble a4,a5,.L2
nop
lw ra,28(sp)
lw s0,24(sp)
addi sp,sp,32
jr ra
.size _start, .-_start
.align 2
.globl mul
.type mul, @function
mul:
addi sp,sp,-32
sw ra,28(sp)
sw s0,24(sp)
addi s0,sp,32
sw a0,-20(s0)
sw a1,-24(s0)
lw a5,-20(s0)
bnez a5,.L4
li a5,0
j .L5
.L4:
lw a5,-20(s0)
addi a5,a5,-1
lw a1,-24(s0)
mv a0,a5
call mul
mv a4,a0
lw a5,-24(s0)
add a5,a4,a5
.L5:
mv a0,a5
lw ra,28(sp)
lw s0,24(sp)
addi sp,sp,32
jr ra
.size mul, .-mul
.ident "GCC: (GNU) 7.2.0"

29
riscv/reonv_crt0.S Normal file
View file

@ -0,0 +1,29 @@
.file "reonv_crt0.S"
.extern _start
.extern main
.globl __reonv_startup
.type "__reonv_startup",@function
# Build minimal crt0 in future
__reonv_startup:
# Set stack (maybe will change this to boot code)
li sp,0x48FFFFF0
call main
jal __exit
# Exit routine
__exit:
ebreak
# Interruptions vector
__interruption_vector:
# Interruptions handlers
__ecall_handler:

BIN
riscv/reonv_set_stack.o
View file

Binary file not shown.

10
riscv/set_stack.s
View file

@ -1,10 +0,0 @@
.extern _start
.extern main
.file "set_stack.s"
.globl _reonv_set_stack
.type _reonv_set_stack,@function
.text
_reonv_set_stack:
lui sp,0x41200
call main
ebreak

71
riscv/teste.S
View file

@ -1,71 +0,0 @@
.file "teste.c"
.option nopic
.text
.align 2
.globl _start
.type _start, @function
_start:
lui sp,0x41200
addi sp,sp,-32
sw ra,28(sp)
sw s0,24(sp)
addi s0,sp,32
li a5,5
sw a5,-20(s0)
lw a0,-20(s0)
#call fib
jal ra,fib
ebreak
sw a0,-24(s0)
nop
lw ra,28(sp)
lw s0,24(sp)
addi sp,sp,32
jr ra
.size _start, .-_start
.align 2
.globl fib
.type fib, @function
fib:
addi sp,sp,-32
sw ra,28(sp)
sw s0,24(sp)
sw s1,20(sp)
addi s0,sp,32
sw a0,-20(s0)
lw a4,-20(s0)
li a5,2
beq a4,a5,.L3
lw a4,-20(s0)
li a5,1
bne a4,a5,.L4
.L3:
li a5,1
j .L5
.L4:
lw a5,-20(s0)
addi a5,a5,-1
mv a0,a5
#call fib
jal ra,fib
mv s1,a0
lw a5,-20(s0)
addi a5,a5,-2
mv a0,a5
#call fib
jal ra,fib
mv a5,a0
add a5,s1,a5
.L5:
mv a0,a5
lw ra,28(sp)
lw s0,24(sp)
lw s1,20(sp)
addi sp,sp,32
jr ra
.size fib, .-fib
.ident "GCC: (GNU) 7.2.0"

BIN
riscv/teste.bin
View file

Binary file not shown.

29
riscv/teste.c
View file

@ -1,18 +1,29 @@
int mul(); int mul();
int fib();
#include <stdio.h>
void main(){ void main(){
int i = 1; int i = 8;
int count = 0; int count = 0;
// Multiplies i by 4 // Multiplies i by 4
do{ //do{
i = mul(i,4); // i = mul(i,3);
count++; // __asm("mv x31,a0");
}while(i < 2500); // count++;
//}while(i < 2500);
i = fib(i);
//printf("i = \n", i);
__asm("ebreak");
}
int fib(int i){
if(i == 1 || i == 2)
return 1;
return fib(i-1) + fib(i-2);
} }
int mul(int i,int j){ int mul(int i,int j){
if (i == 0) return i*j;
return 0;
return mul(i - 1,j) + j;
} }

62
riscv/teste.s
View file

@ -1,62 +0,0 @@
.file "teste.c"
.option nopic
.text
.align 2
.globl _start
.type _start, @function
_start:
addi sp,sp,-32
sw ra,28(sp)
sw s0,24(sp)
addi s0,sp,32
li a5,5
sw a5,-20(s0)
lw a0,-20(s0)
call fib
sw a0,-24(s0)
nop
lw ra,28(sp)
lw s0,24(sp)
addi sp,sp,32
jr ra
.size _start, .-_start
.align 2
.globl fib
.type fib, @function
fib:
addi sp,sp,-32
sw ra,28(sp)
sw s0,24(sp)
sw s1,20(sp)
addi s0,sp,32
sw a0,-20(s0)
lw a4,-20(s0)
li a5,2
beq a4,a5,.L3
lw a4,-20(s0)
li a5,1
bne a4,a5,.L4
.L3:
li a5,1
j .L5
.L4:
lw a5,-20(s0)
addi a5,a5,-1
mv a0,a5
call fib
mv s1,a0
lw a5,-20(s0)
addi a5,a5,-2
mv a0,a5
call fib
mv a5,a0
add a5,s1,a5
.L5:
mv a0,a5
lw ra,28(sp)
lw s0,24(sp)
lw s1,20(sp)
addi sp,sp,32
jr ra
.size fib, .-fib
.ident "GCC: (GNU) 7.2.0"