mirror of
https://github.com/lcbcFoo/ReonV.git
synced 2025-04-18 18:44:43 -04:00
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This commit is contained in:
lcbcFoo
parent
0adc8f6131
commit
be0d492e0b
9 changed files with 168 additions and 51 deletions
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@ -141,7 +141,6 @@ CONFIG_ICACHE_ALGORND=y
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# CONFIG_ICACHE_ALGOLRR is not set
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# CONFIG_ICACHE_ALGOLRU is not set
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# CONFIG_ICACHE_LOCK is not set
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# CONFIG_ICACHE_LRAM is not set
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CONFIG_DCACHE_ENABLE=y
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# CONFIG_DCACHE_ASSO1 is not set
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# CONFIG_DCACHE_ASSO2 is not set
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@ -165,12 +164,26 @@ CONFIG_DCACHE_ALGORND=y
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# CONFIG_DCACHE_LOCK is not set
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# CONFIG_DCACHE_SNOOP is not set
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CONFIG_CACHE_FIXED=0
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# CONFIG_DCACHE_LRAM is not set
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#
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# MMU
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#
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# CONFIG_MMU_ENABLE is not set
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CONFIG_MMU_ENABLE=y
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CONFIG_MMU_COMBINED=y
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# CONFIG_MMU_SPLIT is not set
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# CONFIG_MMU_REPARRAY is not set
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CONFIG_MMU_REPINCREMENT=y
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# CONFIG_MMU_I2 is not set
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# CONFIG_MMU_I4 is not set
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CONFIG_MMU_I8=y
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# CONFIG_MMU_I16 is not set
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# CONFIG_MMU_I32 is not set
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# CONFIG_MMU_I64 is not set
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CONFIG_MMU_PAGE_4K=y
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# CONFIG_MMU_PAGE_8K is not set
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# CONFIG_MMU_PAGE_16K is not set
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# CONFIG_MMU_PAGE_32K is not set
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# CONFIG_MMU_PAGE_PROG is not set
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#
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# Debug Support Unit
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@ -183,14 +196,7 @@ CONFIG_DSU_ITRACESZ1=y
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# CONFIG_DSU_ITRACESZ8 is not set
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# CONFIG_DSU_ITRACESZ16 is not set
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# CONFIG_DSU_ITRACE_2P is not set
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CONFIG_DSU_ATRACE=y
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CONFIG_DSU_ATRACESZ1=y
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# CONFIG_DSU_ATRACESZ2 is not set
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# CONFIG_DSU_ATRACESZ4 is not set
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# CONFIG_DSU_ATRACESZ8 is not set
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# CONFIG_DSU_ATRACESZ16 is not set
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# CONFIG_DSU_AFILT is not set
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# CONFIG_DSU_ASTAT is not set
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# CONFIG_DSU_ATRACE is not set
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# CONFIG_STAT_ENABLE is not set
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#
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@ -299,15 +305,8 @@ CONFIG_UA1_FIFO2=y
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# CONFIG_UA1_FIFO8 is not set
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# CONFIG_UA1_FIFO16 is not set
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# CONFIG_UA1_FIFO32 is not set
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CONFIG_IRQ3_ENABLE=y
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# CONFIG_IRQ3_SEC is not set
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CONFIG_GPT_ENABLE=y
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CONFIG_GPT_NTIM=2
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CONFIG_GPT_SW=8
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CONFIG_GPT_TW=32
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CONFIG_GPT_IRQ=8
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CONFIG_GPT_SEPIRQ=y
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# CONFIG_GPT_WDOGEN is not set
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# CONFIG_IRQ3_ENABLE is not set
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# CONFIG_GPT_ENABLE is not set
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CONFIG_GRGPIO_ENABLE=y
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CONFIG_GRGPIO_WIDTH=8
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CONFIG_GRGPIO_IMASK=0000
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@ -136,7 +136,6 @@
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#undef CONFIG_ICACHE_ALGOLRR
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#undef CONFIG_ICACHE_ALGOLRU
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#undef CONFIG_ICACHE_LOCK
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#undef CONFIG_ICACHE_LRAM
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#define CONFIG_DCACHE_ENABLE 1
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#undef CONFIG_DCACHE_ASSO1
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#undef CONFIG_DCACHE_ASSO2
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@ -160,11 +159,25 @@
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#undef CONFIG_DCACHE_LOCK
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#undef CONFIG_DCACHE_SNOOP
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#define CONFIG_CACHE_FIXED 0
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#undef CONFIG_DCACHE_LRAM
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/*
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* MMU
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*/
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#undef CONFIG_MMU_ENABLE
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#define CONFIG_MMU_ENABLE 1
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#define CONFIG_MMU_COMBINED 1
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#undef CONFIG_MMU_SPLIT
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#undef CONFIG_MMU_REPARRAY
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#define CONFIG_MMU_REPINCREMENT 1
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#undef CONFIG_MMU_I2
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#undef CONFIG_MMU_I4
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#define CONFIG_MMU_I8 1
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#undef CONFIG_MMU_I16
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#undef CONFIG_MMU_I32
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#undef CONFIG_MMU_I64
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#define CONFIG_MMU_PAGE_4K 1
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#undef CONFIG_MMU_PAGE_8K
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#undef CONFIG_MMU_PAGE_16K
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#undef CONFIG_MMU_PAGE_32K
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#undef CONFIG_MMU_PAGE_PROG
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/*
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* Debug Support Unit
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*/
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@ -176,14 +189,7 @@
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#undef CONFIG_DSU_ITRACESZ8
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#undef CONFIG_DSU_ITRACESZ16
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#undef CONFIG_DSU_ITRACE_2P
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#define CONFIG_DSU_ATRACE 1
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#define CONFIG_DSU_ATRACESZ1 1
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#undef CONFIG_DSU_ATRACESZ2
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#undef CONFIG_DSU_ATRACESZ4
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#undef CONFIG_DSU_ATRACESZ8
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#undef CONFIG_DSU_ATRACESZ16
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#undef CONFIG_DSU_AFILT
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#undef CONFIG_DSU_ASTAT
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#undef CONFIG_DSU_ATRACE
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#undef CONFIG_STAT_ENABLE
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/*
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* Fault-tolerance
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@ -281,15 +287,8 @@
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#undef CONFIG_UA1_FIFO8
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#undef CONFIG_UA1_FIFO16
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#undef CONFIG_UA1_FIFO32
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#define CONFIG_IRQ3_ENABLE 1
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#undef CONFIG_IRQ3_SEC
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#define CONFIG_GPT_ENABLE 1
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#define CONFIG_GPT_NTIM (2)
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#define CONFIG_GPT_SW (8)
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#define CONFIG_GPT_TW (32)
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#define CONFIG_GPT_IRQ (8)
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#define CONFIG_GPT_SEPIRQ 1
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#undef CONFIG_GPT_WDOGEN
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#undef CONFIG_IRQ3_ENABLE
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#undef CONFIG_GPT_ENABLE
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#define CONFIG_GRGPIO_ENABLE 1
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#define CONFIG_GRGPIO_WIDTH (8)
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#define CONFIG_GRGPIO_IMASK 0000
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@ -57,15 +57,15 @@ package config is
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constant CFG_DLRAMEN : integer := 0;
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constant CFG_DLRAMADDR: integer := 16#8F#;
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constant CFG_DLRAMSZ : integer := 1;
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constant CFG_MMUEN : integer := 0;
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constant CFG_ITLBNUM : integer := 2;
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constant CFG_MMUEN : integer := 1;
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constant CFG_ITLBNUM : integer := 8;
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constant CFG_DTLBNUM : integer := 2;
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constant CFG_TLB_TYPE : integer := 1 + 0*2;
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constant CFG_TLB_REP : integer := 1;
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constant CFG_MMU_PAGE : integer := 0;
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constant CFG_DSU : integer := 1;
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constant CFG_ITBSZ : integer := 1 + 64*0;
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constant CFG_ATBSZ : integer := 1;
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constant CFG_ATBSZ : integer := 0;
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constant CFG_AHBPF : integer := 0;
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constant CFG_LEON3FT_EN : integer := 0;
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constant CFG_IUFT_EN : integer := 0;
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@ -147,15 +147,15 @@ package config is
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constant CFG_UART1_ENABLE : integer := 1;
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constant CFG_UART1_FIFO : integer := 2;
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-- LEON3 interrupt controller
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constant CFG_IRQ3_ENABLE : integer := 1;
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constant CFG_IRQ3_ENABLE : integer := 0;
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constant CFG_IRQ3_NSEC : integer := 0;
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-- Modular timer
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constant CFG_GPT_ENABLE : integer := 1;
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constant CFG_GPT_NTIM : integer := (2);
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constant CFG_GPT_SW : integer := (8);
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constant CFG_GPT_TW : integer := (32);
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constant CFG_GPT_IRQ : integer := (8);
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constant CFG_GPT_SEPIRQ : integer := 1;
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constant CFG_GPT_ENABLE : integer := 0;
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constant CFG_GPT_NTIM : integer := 1;
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constant CFG_GPT_SW : integer := 8;
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constant CFG_GPT_TW : integer := 8;
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constant CFG_GPT_IRQ : integer := 8;
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constant CFG_GPT_SEPIRQ : integer := 0;
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constant CFG_GPT_WDOGEN : integer := 0;
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constant CFG_GPT_WDOG : integer := 16#0#;
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-- GPIO port
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@ -29,6 +29,8 @@ int main(){
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// Writes the check into output memory section
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write(0, &correct, sizeof(int));
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dbgleon_printf("CARAI PRINT");
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}
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int fib(int i){
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BIN
riscv/main.out
Executable file
BIN
riscv/main.out
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@ -28,6 +28,85 @@ static char* heap = (char*) HEAP_START;
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static char* out_mem = (char*)OUT_MEM_BEGIN;
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#define LEON_REG_UART_CONTROL_RTD 0x000000FF /* RX/TX data */
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/*
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* The following defines the bits in the LEON UART Status Registers.
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*/
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#define LEON_REG_UART_STATUS_DR 0x00000001 /* Data Ready */
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#define LEON_REG_UART_STATUS_TSE 0x00000002 /* TX Send Register Empty */
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#define LEON_REG_UART_STATUS_THE 0x00000004 /* TX Hold Register Empty */
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#define LEON_REG_UART_STATUS_BR 0x00000008 /* Break Error */
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#define LEON_REG_UART_STATUS_OE 0x00000010 /* RX Overrun Error */
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#define LEON_REG_UART_STATUS_PE 0x00000020 /* RX Parity Error */
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#define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */
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#define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */
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/*
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* The following defines the bits in the LEON UART Status Registers.
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*/
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#define LEON_REG_UART_CTRL_RE 0x00000001 /* Receiver enable */
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#define LEON_REG_UART_CTRL_TE 0x00000002 /* Transmitter enable */
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#define LEON_REG_UART_CTRL_RI 0x00000004 /* Receiver interrupt enable */
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#define LEON_REG_UART_CTRL_TI 0x00000008 /* Transmitter interrupt enable */
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#define LEON_REG_UART_CTRL_PS 0x00000010 /* Parity select */
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#define LEON_REG_UART_CTRL_PE 0x00000020 /* Parity enable */
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#define LEON_REG_UART_CTRL_FL 0x00000040 /* Flow control enable */
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#define LEON_REG_UART_CTRL_LB 0x00000080 /* Loop Back enable */
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typedef struct
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{
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volatile unsigned int data;
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volatile unsigned int status;
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volatile unsigned int ctrl;
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volatile unsigned int scaler;
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} LEON23_APBUART_Regs_Map;
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#define UART_TIMEOUT 100000
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static LEON23_APBUART_Regs_Map *uart_regs = 0;
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//int *console = (int *) 0x80000100;
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int
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dbgleon_printf (const char *fmt, ...)
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{
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unsigned int i, loops, ch;
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int printed_len;
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char printk_buf[1024];
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char *p = printk_buf;
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/* Emit the output into the temporary buffer */
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p = fmt;
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printed_len = 10;
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uart_regs = (LEON23_APBUART_Regs_Map*) 0x80000100;
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if (uart_regs){
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while (printed_len-- != 0){
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ch = *p++;
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if (uart_regs){
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loops = 0;
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while (!(uart_regs->status & LEON_REG_UART_STATUS_THE) && (loops < UART_TIMEOUT))
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loops++;
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uart_regs->data = ch;
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loops = 0;
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while (!(uart_regs->status & LEON_REG_UART_STATUS_TSE) && (loops < UART_TIMEOUT))
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loops++;
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}
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}
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}
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//---------------------
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}
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// Exit application
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void _exit_c( int status ) {
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__asm("ebreak");
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BIN
riscv/posix.o
Normal file
BIN
riscv/posix.o
Normal file
Binary file not shown.
BIN
riscv/reonv_crt0.o
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BIN
riscv/reonv_crt0.o
Normal file
Binary file not shown.
38
riscv/teste_uart.c
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38
riscv/teste_uart.c
Normal file
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@ -0,0 +1,38 @@
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int fib();
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#include <stdio.h>
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int main(){
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int n = 8;
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// Allocates memory for arrays
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int* array = (int*)sbrk(n * sizeof(int));
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int* array2 = (int*)sbrk(n * sizeof(int));
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// Calculates fib(i), 1 <= i <= n
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for(int i = 1; i <= n; i++)
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array[i-1] = fib(i);
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// Writes results on output memory section
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write(0, array,n * sizeof(int));
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// Sets pointer to beginning of output memory section
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lseek(0, -n*sizeof(int), SEEK_CUR);
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// Reads the results into array2
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read(0, array2, n * sizeof(int));
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// Checks if they were copied correctly
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int correct = 0xAAAAAAAA;
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for(int i = 0; i < n; i++)
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if(array[i] != array2[i])
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correct = 0xBBBBBBBB;
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// Writes the check into output memory section
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write(0, &correct, sizeof(int));
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}
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int fib(int i){
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if(i == 1 || i == 2)
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return 1;
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return fib(i-1) + fib(i-2);
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}
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