mirror of
https://github.com/lcbcFoo/ReonV.git
synced 2025-04-18 18:44:43 -04:00
172 lines
5.2 KiB
C
172 lines
5.2 KiB
C
#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <unistd.h>
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#ifdef WIN32
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#include <winsock2.h>
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#endif
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main (argc, argv)
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int argc; char **argv;
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{
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struct stat sbuf;
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unsigned char x[128];
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int i, j, res, fsize, abits, tmp, dbits, alow;
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FILE *fp, *wfp;
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char *suffix = "";
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char *xgeneric = "";
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if (argc < 3) exit(1);
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res = stat(argv[1], &sbuf);
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if (res < 0) exit(2);
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fsize = sbuf.st_size;
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fp = fopen(argv[1], "rb");
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wfp = fopen(argv[2], "w+");
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if (fp == NULL) exit(2);
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if (wfp == NULL) exit(2);
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dbits = 32;
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if (argc > 3) {
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dbits = atoi(argv[3]);
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}
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if (dbits != 32 && dbits != 64 && dbits != 128) exit(3);
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if (dbits == 64) suffix="64"; else if (dbits == 128) suffix="128";
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if (dbits != 32) xgeneric=";\n wideonly: integer := 0";
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tmp = fsize; abits = 0;
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while (tmp) {tmp >>= 1; abits++;}
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tmp = (dbits >> 4); alow = 0;
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while (tmp) {tmp >>= 1; alow++; }
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printf("Creating %s : file size: %d bytes, address bits %d, data width %d\n", argv[2], fsize, abits, dbits);
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fprintf(wfp, "\n\
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----------------------------------------------------------------------------\n\
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-- This file is a part of the GRLIB VHDL IP LIBRARY\n\
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-- Copyright (C) 2010 Aeroflex Gaisler\n\
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----------------------------------------------------------------------------\n\
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-- Entity: ahbrom%s\n\
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-- File: ahbrom%s.vhd\n\
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-- Author: Jiri Gaisler - Gaisler Research\n\
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-- Modified Alen Bardizbanyan - Cobham Gaisler (pipelined impl.)\n\
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-- Description: AHB rom. 0/1-waitstate read\n\
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----------------------------------------------------------------------------\n\
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library ieee;\n\
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use ieee.std_logic_1164.all;\n\
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library grlib;\n\
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use grlib.amba.all;\n\
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use grlib.stdlib.all;\n\
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use grlib.devices.all;\n\
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use grlib.config_types.all;\n\
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use grlib.config.all;\n\
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\n\
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entity ahbrom%s is\n\
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generic (\n\
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hindex : integer := 0;\n\
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haddr : integer := 0;\n\
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hmask : integer := 16#fff#;\n\
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pipe : integer := 0;\n\
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tech : integer := 0;\n\
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kbytes : integer := 1%s);\n\
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port (\n\
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rst : in std_ulogic;\n\
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clk : in std_ulogic;\n\
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ahbsi : in ahb_slv_in_type;\n\
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ahbso : out ahb_slv_out_type\n\
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);\n\
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end;\n\
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\n\
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architecture rtl of ahbrom%s is\n\
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constant abits : integer := %d;\n\
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constant bytes : integer := %d;\n\
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constant dbits : integer := %d;\n\
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\n\
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constant hconfig : ahb_config_type := (\n\
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0 => ahb_device_reg ( VENDOR_GAISLER, GAISLER_AHBROM, 0, 0, 0),\n\
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4 => ahb_membar(haddr, '1', '1', hmask), others => zero32);\n\
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\n\
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signal romdata : std_logic_vector(dbits-1 downto 0);\n\
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signal romdatas : std_logic_vector(AHBDW-1 downto 0);\n\
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signal addr : std_logic_vector(abits-1 downto 2);\n\
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signal hsize : std_logic_vector(2 downto 0);\n\
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signal romaddr : std_logic_vector(abits-1 downto log2(dbits/8));\n\
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signal hready, active : std_ulogic;\n\
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\n\
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constant RESET_ALL : boolean := GRLIB_CONFIG_ARRAY(grlib_sync_reset_enable_all) = 1;\n\
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\n\
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begin\n\
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\n\
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ahbso.hresp <= \"00\";\n\
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ahbso.hsplit <= (others => '0');\n\
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ahbso.hirq <= (others => '0');\n\
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ahbso.hconfig <= hconfig;\n\
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ahbso.hindex <= hindex;\n\
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\n\
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reg : process (clk)\n\
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begin\n\
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if rising_edge(clk) then\n\
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addr <= ahbsi.haddr(abits-1 downto 2);\n\
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hsize <= ahbsi.hsize;\n\
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if RESET_ALL and rst='0' then addr <= (others => '0'); hsize <= \"000\"; end if;\n\
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end if;\n\
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end process;\n\
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\n\
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p0 : if pipe = 0 generate\n\
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ahbso.hrdata <= romdatas;\n\
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ahbso.hready <= '1';\n\
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hready <= '0';\n\
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end generate;\n\
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\n\
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active <= ahbsi.hsel(hindex) and ahbsi.htrans(1) and ahbsi.hready;\n\
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p1 : if pipe = 1 generate\n\
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ahbso.hready <= hready;\n\
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reg2 : process (clk)\n\
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begin\n\
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if rising_edge(clk) then\n\
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hready <= (not rst) or (not active) or (not(hready));\n\
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ahbso.hrdata <= romdatas;\n\
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if RESET_ALL and rst='0' then hready <= '1'; ahbso.hrdata <= (others => '0'); end if;\n\
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end if;\n\
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end process;\n\
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end generate;\n\
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\n\
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romaddr <= addr(abits-1 downto log2(dbits/8));\n\
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", suffix, suffix, suffix, xgeneric, suffix, abits, fsize, dbits);
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if (dbits < 64) {
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fprintf(wfp, " romdatas <= ahbdrivedata(romdata);\n");
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} else {
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fprintf(wfp, "\
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romdatas <= ahbdrivedata(romdata) when wideonly/=0 or CORE_ACDM=1 else \n\
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ahbselectdata(ahbdrivedata(romdata),addr(4 downto 2),hsize);\n\
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");
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}
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fprintf(wfp, "\n\
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comb : process (romaddr)\n\
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begin\n\
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case conv_integer(romaddr) is\n\
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");
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i = 0;
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while (!feof(fp)) {
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memset(x,0,dbits/8);
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fread(x, 1, dbits/8, fp);
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fprintf(wfp, " when 16#%05X# => romdata <= X\"", i++);
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for (j=0; j<dbits/8; j++)
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fprintf(wfp, "%02x",x[j]);
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fprintf(wfp,"\";\n");
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}
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fprintf(wfp, "\
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when others => romdata <= (others => '-');\n\
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end case;\n\
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end process;\n\
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-- pragma translate_off\n\
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bootmsg : report_version\n\
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generic map (\"ahbrom%s%s\" & tost(hindex) &\n\
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\": %d-bit AHB ROM Module, \" & tost(bytes/(dbits/8)) & \" words, \" & tost(abits-log2(dbits/8)) & \" address bits\" );\n\
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-- pragma translate_on\n\
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end;\n\
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",suffix,(dbits>32)?"_":"",dbits);
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fclose (wfp);
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fclose (fp);
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return(0);
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exit(0);
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}
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