mirror of
https://github.com/rdolbeau/VexRiscvBPluginGenerator.git
synced 2025-04-16 09:44:41 -04:00
'cleanup'
This commit is contained in:
Romain Dolbeau
parent
c56ad23e49
commit
423bcc6b24
6 changed files with 108 additions and 155 deletions
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@ -546,71 +546,71 @@ class BitManipAllPlugin(earlyInjection : Boolean = true) extends Plugin[VexRiscv
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execute plug new Area{
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import execute._
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val val_bitwise = input(BitManipAllCtrlbitwise).mux(
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BitManipAllCtrlbitwiseEnum.CTRL_ANDN -> (input(SRC1) & ~input(SRC2)),
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BitManipAllCtrlbitwiseEnum.CTRL_ORN -> (input(SRC1) | ~input(SRC2)),
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BitManipAllCtrlbitwiseEnum.CTRL_XNOR -> (input(SRC1) ^ ~input(SRC2))
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BitManipAllCtrlbitwiseEnum.CTRL_ANDN -> (input(SRC1) & ~input(SRC2)).asBits,
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BitManipAllCtrlbitwiseEnum.CTRL_ORN -> (input(SRC1) | ~input(SRC2)).asBits,
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BitManipAllCtrlbitwiseEnum.CTRL_XNOR -> (input(SRC1) ^ ~input(SRC2)).asBits
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) // mux bitwise
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val val_shift = input(BitManipAllCtrlshift).mux(
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BitManipAllCtrlshiftEnum.CTRL_SLO -> ~((~input(SRC1)) |<< (input(SRC2)&31).asUInt),
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BitManipAllCtrlshiftEnum.CTRL_SRO -> ~((~input(SRC1)) |>> (input(SRC2)&31).asUInt)
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BitManipAllCtrlshiftEnum.CTRL_SLO -> ~((~input(SRC1)) |<< (input(SRC2)&31).asUInt).asBits,
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BitManipAllCtrlshiftEnum.CTRL_SRO -> ~((~input(SRC1)) |>> (input(SRC2)&31).asUInt).asBits
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) // mux shift
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val val_rotation = input(BitManipAllCtrlrotation).mux(
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BitManipAllCtrlrotationEnum.CTRL_ROL -> input(SRC1).rotateLeft((input(SRC2)&31)(4 downto 0).asUInt),
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BitManipAllCtrlrotationEnum.CTRL_ROR -> input(SRC1).rotateRight((input(SRC2)&31)(4 downto 0).asUInt)
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BitManipAllCtrlrotationEnum.CTRL_ROL -> input(SRC1).rotateLeft((input(SRC2)&31)(4 downto 0).asUInt).asBits,
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BitManipAllCtrlrotationEnum.CTRL_ROR -> input(SRC1).rotateRight((input(SRC2)&31)(4 downto 0).asUInt).asBits
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) // mux rotation
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val val_sh_add = input(BitManipAllCtrlsh_add).mux(
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BitManipAllCtrlsh_addEnum.CTRL_SH1ADD -> ((input(SRC1) |<< 1).asUInt + input(SRC2).asUInt),
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BitManipAllCtrlsh_addEnum.CTRL_SH2ADD -> ((input(SRC1) |<< 2).asUInt + input(SRC2).asUInt),
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BitManipAllCtrlsh_addEnum.CTRL_SH3ADD -> ((input(SRC1) |<< 3).asUInt + input(SRC2).asUInt)
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BitManipAllCtrlsh_addEnum.CTRL_SH1ADD -> ((input(SRC1) |<< 1).asUInt + input(SRC2).asUInt).asBits,
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BitManipAllCtrlsh_addEnum.CTRL_SH2ADD -> ((input(SRC1) |<< 2).asUInt + input(SRC2).asUInt).asBits,
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BitManipAllCtrlsh_addEnum.CTRL_SH3ADD -> ((input(SRC1) |<< 3).asUInt + input(SRC2).asUInt).asBits
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) // mux sh_add
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val val_singlebit = input(BitManipAllCtrlsinglebit).mux(
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BitManipAllCtrlsinglebitEnum.CTRL_BCLR -> (input(SRC1) & ~(B"32'x00000001"|<<((input(SRC2)&31).asUInt))),
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BitManipAllCtrlsinglebitEnum.CTRL_BEXT -> ((input(SRC1) |>> ((input(SRC2)&31).asUInt)) & B"32'x00000001"),
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BitManipAllCtrlsinglebitEnum.CTRL_BINV -> (input(SRC1) ^ (B"32'x00000001"|<<((input(SRC2)&31).asUInt))),
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BitManipAllCtrlsinglebitEnum.CTRL_BSET -> (input(SRC1) | (B"32'x00000001"|<<((input(SRC2)&31).asUInt)))
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BitManipAllCtrlsinglebitEnum.CTRL_BCLR -> (input(SRC1) & ~(B"32'x00000001"|<<((input(SRC2)&31).asUInt))).asBits,
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BitManipAllCtrlsinglebitEnum.CTRL_BEXT -> ((input(SRC1) |>> ((input(SRC2)&31).asUInt)) & B"32'x00000001").asBits,
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BitManipAllCtrlsinglebitEnum.CTRL_BINV -> (input(SRC1) ^ (B"32'x00000001"|<<((input(SRC2)&31).asUInt))).asBits,
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BitManipAllCtrlsinglebitEnum.CTRL_BSET -> (input(SRC1) | (B"32'x00000001"|<<((input(SRC2)&31).asUInt))).asBits
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) // mux singlebit
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val val_grevroc = input(BitManipAllCtrlgrevroc).mux(
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BitManipAllCtrlgrevrocEnum.CTRL_GORC -> fun_gorc(input(SRC1), input(SRC2)),
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BitManipAllCtrlgrevrocEnum.CTRL_GREV -> fun_grev(input(SRC1), input(SRC2))
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BitManipAllCtrlgrevrocEnum.CTRL_GORC -> fun_gorc(input(SRC1), input(SRC2)).asBits,
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BitManipAllCtrlgrevrocEnum.CTRL_GREV -> fun_grev(input(SRC1), input(SRC2)).asBits
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) // mux grevroc
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val val_minmax = input(BitManipAllCtrlminmax).mux(
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BitManipAllCtrlminmaxEnum.CTRL_MAX -> ((input(SRC1).asSInt > input(SRC2).asSInt) ? input(SRC1) | input(SRC2)),
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BitManipAllCtrlminmaxEnum.CTRL_MAXU -> ((input(SRC1).asUInt > input(SRC2).asUInt) ? input(SRC1) | input(SRC2)),
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BitManipAllCtrlminmaxEnum.CTRL_MIN -> ((input(SRC1).asSInt < input(SRC2).asSInt) ? input(SRC1) | input(SRC2)),
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BitManipAllCtrlminmaxEnum.CTRL_MINU -> ((input(SRC1).asUInt < input(SRC2).asUInt) ? input(SRC1) | input(SRC2))
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BitManipAllCtrlminmaxEnum.CTRL_MAX -> ((input(SRC1).asSInt > input(SRC2).asSInt) ? input(SRC1) | input(SRC2)).asBits,
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BitManipAllCtrlminmaxEnum.CTRL_MAXU -> ((input(SRC1).asUInt > input(SRC2).asUInt) ? input(SRC1) | input(SRC2)).asBits,
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BitManipAllCtrlminmaxEnum.CTRL_MIN -> ((input(SRC1).asSInt < input(SRC2).asSInt) ? input(SRC1) | input(SRC2)).asBits,
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BitManipAllCtrlminmaxEnum.CTRL_MINU -> ((input(SRC1).asUInt < input(SRC2).asUInt) ? input(SRC1) | input(SRC2)).asBits
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) // mux minmax
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val val_shuffle = input(BitManipAllCtrlshuffle).mux(
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BitManipAllCtrlshuffleEnum.CTRL_SHFL -> fun_shfl32(input(SRC1), input(SRC2)),
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BitManipAllCtrlshuffleEnum.CTRL_UNSHFL -> fun_unshfl32(input(SRC1), input(SRC2))
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BitManipAllCtrlshuffleEnum.CTRL_SHFL -> fun_shfl32(input(SRC1), input(SRC2)).asBits,
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BitManipAllCtrlshuffleEnum.CTRL_UNSHFL -> fun_unshfl32(input(SRC1), input(SRC2)).asBits
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) // mux shuffle
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val val_pack = input(BitManipAllCtrlpack).mux(
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BitManipAllCtrlpackEnum.CTRL_PACK -> (input(SRC2)(15 downto 0) ## input(SRC1)(15 downto 0)),
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BitManipAllCtrlpackEnum.CTRL_PACKH -> B"16'x0000" ## (input(SRC2)(7 downto 0) ## input(SRC1)(7 downto 0)),
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BitManipAllCtrlpackEnum.CTRL_PACKU -> (input(SRC2)(31 downto 16) ## input(SRC1)(31 downto 16))
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BitManipAllCtrlpackEnum.CTRL_PACK -> (input(SRC2)(15 downto 0) ## input(SRC1)(15 downto 0)).asBits,
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BitManipAllCtrlpackEnum.CTRL_PACKH -> B"16'x0000" ## (input(SRC2)(7 downto 0) ## input(SRC1)(7 downto 0)).asBits,
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BitManipAllCtrlpackEnum.CTRL_PACKU -> (input(SRC2)(31 downto 16) ## input(SRC1)(31 downto 16)).asBits
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) // mux pack
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val val_xperm = input(BitManipAllCtrlxperm).mux(
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BitManipAllCtrlxpermEnum.CTRL_XPERMdotB -> fun_xperm_b(input(SRC1), input(SRC2)),
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BitManipAllCtrlxpermEnum.CTRL_XPERMdotH -> fun_xperm_h(input(SRC1), input(SRC2)),
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BitManipAllCtrlxpermEnum.CTRL_XPERMdotN -> fun_xperm_n(input(SRC1), input(SRC2))
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BitManipAllCtrlxpermEnum.CTRL_XPERMdotB -> fun_xperm_b(input(SRC1), input(SRC2)).asBits,
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BitManipAllCtrlxpermEnum.CTRL_XPERMdotH -> fun_xperm_h(input(SRC1), input(SRC2)).asBits,
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BitManipAllCtrlxpermEnum.CTRL_XPERMdotN -> fun_xperm_n(input(SRC1), input(SRC2)).asBits
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) // mux xperm
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val val_grevorc = input(BitManipAllCtrlgrevorc).mux(
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BitManipAllCtrlgrevorcEnum.CTRL_GORC -> fun_gorc(input(SRC1), input(SRC2)),
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BitManipAllCtrlgrevorcEnum.CTRL_GREV -> fun_grev(input(SRC1), input(SRC2))
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BitManipAllCtrlgrevorcEnum.CTRL_GORC -> fun_gorc(input(SRC1), input(SRC2)).asBits,
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BitManipAllCtrlgrevorcEnum.CTRL_GREV -> fun_grev(input(SRC1), input(SRC2)).asBits
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) // mux grevorc
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val val_countzeroes = input(BitManipAllCtrlcountzeroes).mux(
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BitManipAllCtrlcountzeroesEnum.CTRL_CLZ -> fun_clz(input(SRC1)),
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BitManipAllCtrlcountzeroesEnum.CTRL_CPOP -> fun_popcnt(input(SRC1)),
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BitManipAllCtrlcountzeroesEnum.CTRL_CTZ -> fun_ctz(input(SRC1))
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BitManipAllCtrlcountzeroesEnum.CTRL_CLZ -> fun_clz(input(SRC1)).asBits,
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BitManipAllCtrlcountzeroesEnum.CTRL_CPOP -> fun_popcnt(input(SRC1)).asBits,
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BitManipAllCtrlcountzeroesEnum.CTRL_CTZ -> fun_ctz(input(SRC1)).asBits
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) // mux countzeroes
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val val_signextend = input(BitManipAllCtrlsignextend).mux(
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BitManipAllCtrlsignextendEnum.CTRL_SEXTdotB -> (Bits(24 bits).setAllTo(input(SRC1)(7)) ## input(SRC1)(7 downto 0)),
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BitManipAllCtrlsignextendEnum.CTRL_SEXTdotH -> (Bits(16 bits).setAllTo(input(SRC1)(15)) ## input(SRC1)(15 downto 0))
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BitManipAllCtrlsignextendEnum.CTRL_SEXTdotB -> (Bits(24 bits).setAllTo(input(SRC1)(7)) ## input(SRC1)(7 downto 0)).asBits,
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BitManipAllCtrlsignextendEnum.CTRL_SEXTdotH -> (Bits(16 bits).setAllTo(input(SRC1)(15)) ## input(SRC1)(15 downto 0)).asBits
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) // mux signextend
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val val_ternary = input(BitManipAllCtrlternary).mux(
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BitManipAllCtrlternaryEnum.CTRL_CMIX -> ((input(SRC1) & input(SRC2)) | (input(SRC3) & ~input(SRC2))),
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BitManipAllCtrlternaryEnum.CTRL_CMOV -> ((input(SRC2).asUInt =/= 0) ? input(SRC1) | input(SRC3)),
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BitManipAllCtrlternaryEnum.CTRL_FSL -> fun_fsl(input(SRC1), input(SRC3), input(SRC2)),
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BitManipAllCtrlternaryEnum.CTRL_FSR -> fun_fsr(input(SRC1), input(SRC3), input(SRC2))
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BitManipAllCtrlternaryEnum.CTRL_CMIX -> ((input(SRC1) & input(SRC2)) | (input(SRC3) & ~input(SRC2))).asBits,
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BitManipAllCtrlternaryEnum.CTRL_CMOV -> ((input(SRC2).asUInt =/= 0) ? input(SRC1) | input(SRC3)).asBits,
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BitManipAllCtrlternaryEnum.CTRL_FSL -> fun_fsl(input(SRC1), input(SRC3), input(SRC2)).asBits,
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BitManipAllCtrlternaryEnum.CTRL_FSR -> fun_fsr(input(SRC1), input(SRC3), input(SRC2)).asBits
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) // mux ternary
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insert(BitManipAll_FINAL_OUTPUT) := input(BitManipAllCtrl).mux(
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BitManipAllCtrlEnum.CTRL_bitwise -> val_bitwise.asBits,
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@ -458,35 +458,35 @@ class BitManipZbpPlugin(earlyInjection : Boolean = true) extends Plugin[VexRiscv
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execute plug new Area{
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import execute._
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val val_bitwise = input(BitManipZbpCtrlbitwise).mux(
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BitManipZbpCtrlbitwiseEnum.CTRL_ANDN -> (input(SRC1) & ~input(SRC2)),
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BitManipZbpCtrlbitwiseEnum.CTRL_ORN -> (input(SRC1) | ~input(SRC2)),
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BitManipZbpCtrlbitwiseEnum.CTRL_XNOR -> (input(SRC1) ^ ~input(SRC2))
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BitManipZbpCtrlbitwiseEnum.CTRL_ANDN -> (input(SRC1) & ~input(SRC2)).asBits,
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BitManipZbpCtrlbitwiseEnum.CTRL_ORN -> (input(SRC1) | ~input(SRC2)).asBits,
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BitManipZbpCtrlbitwiseEnum.CTRL_XNOR -> (input(SRC1) ^ ~input(SRC2)).asBits
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) // mux bitwise
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val val_rotation = input(BitManipZbpCtrlrotation).mux(
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BitManipZbpCtrlrotationEnum.CTRL_ROL -> input(SRC1).rotateLeft((input(SRC2)&31)(4 downto 0).asUInt),
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BitManipZbpCtrlrotationEnum.CTRL_ROR -> input(SRC1).rotateRight((input(SRC2)&31)(4 downto 0).asUInt)
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BitManipZbpCtrlrotationEnum.CTRL_ROL -> input(SRC1).rotateLeft((input(SRC2)&31)(4 downto 0).asUInt).asBits,
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BitManipZbpCtrlrotationEnum.CTRL_ROR -> input(SRC1).rotateRight((input(SRC2)&31)(4 downto 0).asUInt).asBits
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) // mux rotation
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val val_grevroc = input(BitManipZbpCtrlgrevroc).mux(
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BitManipZbpCtrlgrevrocEnum.CTRL_GORC -> fun_gorc(input(SRC1), input(SRC2)),
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BitManipZbpCtrlgrevrocEnum.CTRL_GREV -> fun_grev(input(SRC1), input(SRC2))
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BitManipZbpCtrlgrevrocEnum.CTRL_GORC -> fun_gorc(input(SRC1), input(SRC2)).asBits,
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BitManipZbpCtrlgrevrocEnum.CTRL_GREV -> fun_grev(input(SRC1), input(SRC2)).asBits
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) // mux grevroc
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val val_shuffle = input(BitManipZbpCtrlshuffle).mux(
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BitManipZbpCtrlshuffleEnum.CTRL_SHFL -> fun_shfl32(input(SRC1), input(SRC2)),
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BitManipZbpCtrlshuffleEnum.CTRL_UNSHFL -> fun_unshfl32(input(SRC1), input(SRC2))
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BitManipZbpCtrlshuffleEnum.CTRL_SHFL -> fun_shfl32(input(SRC1), input(SRC2)).asBits,
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BitManipZbpCtrlshuffleEnum.CTRL_UNSHFL -> fun_unshfl32(input(SRC1), input(SRC2)).asBits
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) // mux shuffle
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val val_pack = input(BitManipZbpCtrlpack).mux(
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BitManipZbpCtrlpackEnum.CTRL_PACK -> (input(SRC2)(15 downto 0) ## input(SRC1)(15 downto 0)),
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BitManipZbpCtrlpackEnum.CTRL_PACKH -> B"16'x0000" ## (input(SRC2)(7 downto 0) ## input(SRC1)(7 downto 0)),
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BitManipZbpCtrlpackEnum.CTRL_PACKU -> (input(SRC2)(31 downto 16) ## input(SRC1)(31 downto 16))
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BitManipZbpCtrlpackEnum.CTRL_PACK -> (input(SRC2)(15 downto 0) ## input(SRC1)(15 downto 0)).asBits,
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BitManipZbpCtrlpackEnum.CTRL_PACKH -> B"16'x0000" ## (input(SRC2)(7 downto 0) ## input(SRC1)(7 downto 0)).asBits,
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BitManipZbpCtrlpackEnum.CTRL_PACKU -> (input(SRC2)(31 downto 16) ## input(SRC1)(31 downto 16)).asBits
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) // mux pack
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val val_xperm = input(BitManipZbpCtrlxperm).mux(
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BitManipZbpCtrlxpermEnum.CTRL_XPERMdotB -> fun_xperm_b(input(SRC1), input(SRC2)),
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BitManipZbpCtrlxpermEnum.CTRL_XPERMdotH -> fun_xperm_h(input(SRC1), input(SRC2)),
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BitManipZbpCtrlxpermEnum.CTRL_XPERMdotN -> fun_xperm_n(input(SRC1), input(SRC2))
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BitManipZbpCtrlxpermEnum.CTRL_XPERMdotB -> fun_xperm_b(input(SRC1), input(SRC2)).asBits,
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BitManipZbpCtrlxpermEnum.CTRL_XPERMdotH -> fun_xperm_h(input(SRC1), input(SRC2)).asBits,
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BitManipZbpCtrlxpermEnum.CTRL_XPERMdotN -> fun_xperm_n(input(SRC1), input(SRC2)).asBits
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) // mux xperm
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val val_grevorc = input(BitManipZbpCtrlgrevorc).mux(
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BitManipZbpCtrlgrevorcEnum.CTRL_GORC -> fun_gorc(input(SRC1), input(SRC2)),
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BitManipZbpCtrlgrevorcEnum.CTRL_GREV -> fun_grev(input(SRC1), input(SRC2))
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BitManipZbpCtrlgrevorcEnum.CTRL_GORC -> fun_gorc(input(SRC1), input(SRC2)).asBits,
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BitManipZbpCtrlgrevorcEnum.CTRL_GREV -> fun_grev(input(SRC1), input(SRC2)).asBits
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) // mux grevorc
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insert(BitManipZbp_FINAL_OUTPUT) := input(BitManipZbpCtrl).mux(
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BitManipZbpCtrlEnum.CTRL_bitwise -> val_bitwise.asBits,
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@ -408,16 +408,16 @@ class CryptoZknePlugin(earlyInjection : Boolean = true) extends Plugin[VexRiscv]
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execute plug new Area{
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import execute._
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val val_aes0 = input(CryptoZkneCtrlaes0).mux(
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CryptoZkneCtrlaes0Enum.CTRL_aes32esmi0 -> fun_aesx_0(input(SRC2), input(SRC1)),
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CryptoZkneCtrlaes0Enum.CTRL_aes32esmi1 -> fun_aesx_1(input(SRC2), input(SRC1)),
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CryptoZkneCtrlaes0Enum.CTRL_aes32esmi2 -> fun_aesx_2(input(SRC2), input(SRC1)),
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CryptoZkneCtrlaes0Enum.CTRL_aes32esmi3 -> fun_aesx_3(input(SRC2), input(SRC1))
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CryptoZkneCtrlaes0Enum.CTRL_aes32esmi0 -> fun_aesx_0(input(SRC2), input(SRC1)).asBits,
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CryptoZkneCtrlaes0Enum.CTRL_aes32esmi1 -> fun_aesx_1(input(SRC2), input(SRC1)).asBits,
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CryptoZkneCtrlaes0Enum.CTRL_aes32esmi2 -> fun_aesx_2(input(SRC2), input(SRC1)).asBits,
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CryptoZkneCtrlaes0Enum.CTRL_aes32esmi3 -> fun_aesx_3(input(SRC2), input(SRC1)).asBits
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) // mux aes0
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val val_aes1 = input(CryptoZkneCtrlaes1).mux(
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CryptoZkneCtrlaes1Enum.CTRL_aes32esi0 -> fun_aesxnm_0(input(SRC2), input(SRC1)),
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CryptoZkneCtrlaes1Enum.CTRL_aes32esi1 -> fun_aesxnm_1(input(SRC2), input(SRC1)),
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CryptoZkneCtrlaes1Enum.CTRL_aes32esi2 -> fun_aesxnm_2(input(SRC2), input(SRC1)),
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CryptoZkneCtrlaes1Enum.CTRL_aes32esi3 -> fun_aesxnm_3(input(SRC2), input(SRC1))
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CryptoZkneCtrlaes1Enum.CTRL_aes32esi0 -> fun_aesxnm_0(input(SRC2), input(SRC1)).asBits,
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CryptoZkneCtrlaes1Enum.CTRL_aes32esi1 -> fun_aesxnm_1(input(SRC2), input(SRC1)).asBits,
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CryptoZkneCtrlaes1Enum.CTRL_aes32esi2 -> fun_aesxnm_2(input(SRC2), input(SRC1)).asBits,
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CryptoZkneCtrlaes1Enum.CTRL_aes32esi3 -> fun_aesxnm_3(input(SRC2), input(SRC1)).asBits
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) // mux aes1
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insert(CryptoZkne_FINAL_OUTPUT) := input(CryptoZkneCtrl).mux(
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CryptoZkneCtrlEnum.CTRL_aes0 -> val_aes0.asBits,
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@ -157,22 +157,22 @@ class CryptoZknhPlugin(earlyInjection : Boolean = true) extends Plugin[VexRiscv]
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execute plug new Area{
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import execute._
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val val_sha256sig = input(CryptoZknhCtrlsha256sig).mux(
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CryptoZknhCtrlsha256sigEnum.CTRL_sha256sig0 -> fun_sha256sig0(input(SRC1)),
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CryptoZknhCtrlsha256sigEnum.CTRL_sha256sig1 -> fun_sha256sig1(input(SRC1))
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CryptoZknhCtrlsha256sigEnum.CTRL_sha256sig0 -> fun_sha256sig0(input(SRC1)).asBits,
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CryptoZknhCtrlsha256sigEnum.CTRL_sha256sig1 -> fun_sha256sig1(input(SRC1)).asBits
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) // mux sha256sig
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val val_sha256sum = input(CryptoZknhCtrlsha256sum).mux(
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CryptoZknhCtrlsha256sumEnum.CTRL_sha256sum0 -> fun_sha256sum0(input(SRC1)),
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CryptoZknhCtrlsha256sumEnum.CTRL_sha256sum1 -> fun_sha256sum1(input(SRC1))
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CryptoZknhCtrlsha256sumEnum.CTRL_sha256sum0 -> fun_sha256sum0(input(SRC1)).asBits,
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CryptoZknhCtrlsha256sumEnum.CTRL_sha256sum1 -> fun_sha256sum1(input(SRC1)).asBits
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) // mux sha256sum
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val val_sha512sig = input(CryptoZknhCtrlsha512sig).mux(
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CryptoZknhCtrlsha512sigEnum.CTRL_sha512sig0h -> fun_sha512sig0h(input(SRC1),input(SRC2)),
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CryptoZknhCtrlsha512sigEnum.CTRL_sha512sig0l -> fun_sha512sig0l(input(SRC1),input(SRC2)),
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CryptoZknhCtrlsha512sigEnum.CTRL_sha512sig1h -> fun_sha512sig1h(input(SRC1),input(SRC2)),
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CryptoZknhCtrlsha512sigEnum.CTRL_sha512sig1l -> fun_sha512sig1l(input(SRC1),input(SRC2))
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CryptoZknhCtrlsha512sigEnum.CTRL_sha512sig0h -> fun_sha512sig0h(input(SRC1),input(SRC2)).asBits,
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CryptoZknhCtrlsha512sigEnum.CTRL_sha512sig0l -> fun_sha512sig0l(input(SRC1),input(SRC2)).asBits,
|
||||
CryptoZknhCtrlsha512sigEnum.CTRL_sha512sig1h -> fun_sha512sig1h(input(SRC1),input(SRC2)).asBits,
|
||||
CryptoZknhCtrlsha512sigEnum.CTRL_sha512sig1l -> fun_sha512sig1l(input(SRC1),input(SRC2)).asBits
|
||||
) // mux sha512sig
|
||||
val val_sha512sum = input(CryptoZknhCtrlsha512sum).mux(
|
||||
CryptoZknhCtrlsha512sumEnum.CTRL_sha512sum0r -> fun_sha512sum0r(input(SRC1),input(SRC2)),
|
||||
CryptoZknhCtrlsha512sumEnum.CTRL_sha512sum1r -> fun_sha512sum1r(input(SRC1),input(SRC2))
|
||||
CryptoZknhCtrlsha512sumEnum.CTRL_sha512sum0r -> fun_sha512sum0r(input(SRC1),input(SRC2)).asBits,
|
||||
CryptoZknhCtrlsha512sumEnum.CTRL_sha512sum1r -> fun_sha512sum1r(input(SRC1),input(SRC2)).asBits
|
||||
) // mux sha512sum
|
||||
insert(CryptoZknh_FINAL_OUTPUT) := input(CryptoZknhCtrl).mux(
|
||||
CryptoZknhCtrlEnum.CTRL_sha256sig -> val_sha256sig.asBits,
|
||||
|
|
|
|||
2
Makefile
2
Makefile
|
|
@ -59,7 +59,7 @@ CryptoZknh.scala: gen_plugin data_sha.txt
|
|||
PDataProcess.scala: gen_plugin data_Zpn.txt
|
||||
./gen_plugin -n PDataProcess -i data_Zpn.txt -I Zpn >| $@
|
||||
|
||||
PSlowDataProcess.scala: gen_plugin data_Zpn.txt
|
||||
PSlowDataProcess.scala: gen_plugin data_Zpn_2cycles.txt
|
||||
./gen_plugin -n PSlowDataProcess -i data_Zpn_2cycles.txt -I Zpn >| $@
|
||||
|
||||
P64DataProcess.scala: gen_plugin data_Zp64.txt
|
||||
|
|
|
|||
113
unparse.cpp
113
unparse.cpp
|
|
@ -53,6 +53,7 @@ void unparse(std::ostream& output,
|
|||
const std::string isString = "IS_" + prefix;
|
||||
const bool two_cycles = em_widths.size() > 0;
|
||||
const std::string bypassableExecuteString = two_cycles ? "False" : "Bool(earlyInjection)";
|
||||
const std::string bypassableMemoryString = two_cycles ? "Bool(earlyInjection)" : "True";
|
||||
|
||||
output << "// WARNING: this is auto-generated code!" << std::endl;
|
||||
output << "// See https://github.com/rdolbeau/VexRiscvBPluginGenerator/" << std::endl;
|
||||
|
|
@ -109,7 +110,7 @@ void unparse(std::ostream& output,
|
|||
output << "} // object Plugin" << std::endl;
|
||||
|
||||
// Plugin class
|
||||
output << "class " << prefix << "Plugin"; if (!two_cycles) output << "(earlyInjection : Boolean = true)"; output << " extends Plugin[VexRiscv] {" << std::endl;
|
||||
output << "class " << prefix << "Plugin(earlyInjection : Boolean = true) extends Plugin[VexRiscv] {" << std::endl;
|
||||
output << '\t' << "import " << prefix << "Plugin._" << std::endl;
|
||||
output << '\t' << "object " << isString << " extends Stageable(Bool)" << std::endl;
|
||||
output << '\t' << "object " << outputString << " extends Stageable(Bits(" << (wide ? 64 : 32) << " bits))" << std::endl;
|
||||
|
|
@ -131,7 +132,7 @@ void unparse(std::ostream& output,
|
|||
output << '\t' << '\t' << "\tREGFILE_WRITE_VALID -> True," << std::endl;
|
||||
if (wide) output << '\t' << '\t' << "\tREGFILE_WRITE_VALID_ODD -> True," << std::endl;
|
||||
output << '\t' << '\t' << "\tBYPASSABLE_EXECUTE_STAGE -> " << bypassableExecuteString << "," << std::endl;
|
||||
output << '\t' << '\t' << "\tBYPASSABLE_MEMORY_STAGE -> True," << std::endl;
|
||||
output << '\t' << '\t' << "\tBYPASSABLE_MEMORY_STAGE -> " << bypassableMemoryString << "," << std::endl;
|
||||
output << '\t' << '\t' << "\tRS1_USE -> True," << std::endl;
|
||||
output << '\t' << '\t' << "\t" << isString << " -> True" << std::endl;
|
||||
output << '\t' << '\t' << "\t)" << std::endl;
|
||||
|
|
@ -142,7 +143,7 @@ void unparse(std::ostream& output,
|
|||
output << '\t' << '\t' << "\tREGFILE_WRITE_VALID -> True," << std::endl;
|
||||
if (wide) output << '\t' << '\t' << "\tREGFILE_WRITE_VALID_ODD -> True," << std::endl;
|
||||
output << '\t' << '\t' << "\tBYPASSABLE_EXECUTE_STAGE -> " << bypassableExecuteString << "," << std::endl;
|
||||
output << '\t' << '\t' << "\tBYPASSABLE_MEMORY_STAGE -> True," << std::endl;
|
||||
output << '\t' << '\t' << "\tBYPASSABLE_MEMORY_STAGE -> " << bypassableMemoryString << "," << std::endl;
|
||||
output << '\t' << '\t' << "\tRS1_USE -> True," << std::endl;
|
||||
output << '\t' << '\t' << "\tRS2_USE -> True," << std::endl;
|
||||
output << '\t' << '\t' << "\t" << isString << " -> True" << std::endl;
|
||||
|
|
@ -153,7 +154,7 @@ void unparse(std::ostream& output,
|
|||
output << '\t' << '\t' << "\tREGFILE_WRITE_VALID -> True," << std::endl;
|
||||
if (wide) output << '\t' << '\t' << "\tREGFILE_WRITE_VALID_ODD -> True," << std::endl;
|
||||
output << '\t' << '\t' << "\tBYPASSABLE_EXECUTE_STAGE -> " << bypassableExecuteString << "," << std::endl;
|
||||
output << '\t' << '\t' << "\tBYPASSABLE_MEMORY_STAGE -> True," << std::endl;
|
||||
output << '\t' << '\t' << "\tBYPASSABLE_MEMORY_STAGE -> " << bypassableMemoryString << "," << std::endl;
|
||||
output << '\t' << '\t' << "\tRS1_USE -> True," << std::endl;
|
||||
output << '\t' << '\t' << "\t" << isString << " -> True" << std::endl;
|
||||
output << '\t' << '\t' << "\t)" << std::endl;
|
||||
|
|
@ -165,7 +166,7 @@ void unparse(std::ostream& output,
|
|||
output << '\t' << '\t' << "\tREGFILE_WRITE_VALID -> True," << std::endl;
|
||||
if (wide) output << '\t' << '\t' << "\tREGFILE_WRITE_VALID_ODD -> True," << std::endl;
|
||||
output << '\t' << '\t' << "\tBYPASSABLE_EXECUTE_STAGE -> " << bypassableExecuteString << "," << std::endl;
|
||||
output << '\t' << '\t' << "\tBYPASSABLE_MEMORY_STAGE -> True," << std::endl;
|
||||
output << '\t' << '\t' << "\tBYPASSABLE_MEMORY_STAGE -> " << bypassableMemoryString << "," << std::endl;
|
||||
output << '\t' << '\t' << "\tRS1_USE -> True," << std::endl;
|
||||
output << '\t' << '\t' << "\tRS2_USE -> True," << std::endl;
|
||||
output << '\t' << '\t' << "\tRS3_USE -> True," << std::endl;
|
||||
|
|
@ -179,7 +180,7 @@ void unparse(std::ostream& output,
|
|||
output << '\t' << '\t' << "\tREGFILE_WRITE_VALID -> True," << std::endl;
|
||||
if (wide) output << '\t' << '\t' << "\tREGFILE_WRITE_VALID_ODD -> True," << std::endl;
|
||||
output << '\t' << '\t' << "\tBYPASSABLE_EXECUTE_STAGE -> " << bypassableExecuteString << "," << std::endl;
|
||||
output << '\t' << '\t' << "\tBYPASSABLE_MEMORY_STAGE -> True," << std::endl;
|
||||
output << '\t' << '\t' << "\tBYPASSABLE_MEMORY_STAGE -> " << bypassableMemoryString << "," << std::endl;
|
||||
output << '\t' << '\t' << "\tRS1_USE -> True," << std::endl;
|
||||
output << '\t' << '\t' << "\tRS3_USE -> True," << std::endl;
|
||||
output << '\t' << '\t' << "\t" << isString << " -> True" << std::endl;
|
||||
|
|
@ -241,17 +242,28 @@ void unparse(std::ostream& output,
|
|||
output << "// End Extra" << std::endl;
|
||||
}
|
||||
|
||||
if (!two_cycles) {
|
||||
output << '\t' << '\t' << "execute plug new Area{" << std::endl;
|
||||
output << '\t' << '\t' << '\t' << "import execute._" << std::endl;
|
||||
std::string where = "execute";
|
||||
if (two_cycles) {
|
||||
for (auto const& pair : em_widths) {
|
||||
std::string regName = prefix + "_INTERMEDIATE_" + pair.first + "" + std::to_string(pair.second);
|
||||
output << '\t' << '\t' << '\t' << "insert(" << regName << ") := " << semantics[pair.first] << ".asBits" << std::endl;
|
||||
}
|
||||
output << '\t' << '\t' << "} // " << where << " plug newArea" << std::endl;
|
||||
output << '\t' << '\t' << "memory plug new Area{" << std::endl;
|
||||
output << '\t' << '\t' << '\t' << "import memory._" << std::endl;
|
||||
where = "memory";
|
||||
}
|
||||
|
||||
// 2nd level MUXes
|
||||
for (const group* g : *groups) {
|
||||
if (g->opnames.size() > 1) {
|
||||
output << '\t' << '\t' << '\t' << "val val_" << g->name << " = input("<< ctrlString << g->name << ").mux(" << std::endl;
|
||||
for (auto it = g->opnames.begin() ; it != g->opnames.end() ; it++) {
|
||||
std::string opname = *it;
|
||||
output << '\t' << '\t' << '\t' << '\t' << ctrlString << g->name << "Enum.CTRL_" << opname << " -> " << semantics[opname];
|
||||
std::string regName = prefix + "_INTERMEDIATE_" + opname + "" + std::to_string(em_widths[opname]);
|
||||
std::string semantic = two_cycles ? mem_semantics[opname] + "(input(" + regName + ")).asBits" : semantics[opname];
|
||||
output << '\t' << '\t' << '\t' << '\t' << ctrlString << g->name << "Enum.CTRL_" << opname << " -> " << semantic + ".asBits";
|
||||
if (std::next(it, 1) == g->opnames.end())
|
||||
output << std::endl;
|
||||
else
|
||||
|
|
@ -260,7 +272,6 @@ void unparse(std::ostream& output,
|
|||
output << '\t' << '\t' << '\t' << ") // mux " << g->name << std::endl;
|
||||
}
|
||||
}
|
||||
|
||||
// conditional last level mux
|
||||
output << '\t' << '\t' << '\t' << "insert(" << outputString << ") := input(" << ctrlString << ").mux(" << std::endl;
|
||||
for (auto it = groups->begin() ; it != groups->end() ; it++) {
|
||||
|
|
@ -268,7 +279,10 @@ void unparse(std::ostream& output,
|
|||
if (g->opnames.size() > 1) {
|
||||
output << '\t' << '\t' << '\t' << '\t' << ctrlEnumString << "." << g->ctrlName() << " -> val_" << g->name << ".asBits";
|
||||
} else {
|
||||
output << '\t' << '\t' << '\t' << '\t' << ctrlEnumString << ".CTRL_" << (*g->opnames.begin()) << " -> " << semantics[*g->opnames.begin()] << ".asBits";
|
||||
std::string opname = *g->opnames.begin();
|
||||
std::string regName = prefix + "_INTERMEDIATE_" + opname + "" + std::to_string(em_widths[opname]);
|
||||
std::string semantic = two_cycles ? mem_semantics[opname] + "(input(" + regName + ")).asBits" : semantics[opname] + ".asBits";
|
||||
output << '\t' << '\t' << '\t' << '\t' << ctrlEnumString << ".CTRL_" << opname << " -> " << semantic;
|
||||
}
|
||||
if (std::next(it, 1) == groups->end())
|
||||
output << std::endl;
|
||||
|
|
@ -276,9 +290,14 @@ void unparse(std::ostream& output,
|
|||
output << "," << std::endl;
|
||||
}
|
||||
output << '\t' << '\t' << '\t' << ") // primary mux" << std::endl;
|
||||
output << '\t' << '\t' << "} // execute plug newArea" << std::endl;
|
||||
output << '\t' << '\t' << "} // " << where << " plug newArea" << std::endl;
|
||||
if (!two_cycles) {
|
||||
output << '\t' << '\t' << "val injectionStage = if(earlyInjection) execute else memory" << std::endl;
|
||||
} else {
|
||||
output << '\t' << '\t' << "val injectionStage = if(earlyInjection) memory else writeBack" << std::endl;
|
||||
}
|
||||
where = "injectionStage";
|
||||
|
||||
output << '\t' << '\t' << "val injectionStage = if(earlyInjection) execute else memory" << std::endl;
|
||||
output << '\t' << '\t' << "injectionStage plug new Area {" << std::endl;
|
||||
output << '\t' << '\t' << '\t' << "import injectionStage._" << std::endl;
|
||||
output << '\t' << '\t' << '\t' << "when (arbitration.isValid && input(" << isString << ")) {" << std::endl;
|
||||
|
|
@ -289,73 +308,7 @@ void unparse(std::ostream& output,
|
|||
output << '\t' << '\t' << '\t' << '\t' << "output(REGFILE_WRITE_DATA) := input(" << outputString << ")" << std::endl;
|
||||
}
|
||||
output << '\t' << '\t' << '\t' << "} // when input is" << std::endl;
|
||||
output << '\t' << '\t' << "} // injectionStage plug newArea" << std::endl;
|
||||
} else { // two-cycles
|
||||
output << '\t' << '\t' << "execute plug new Area{" << std::endl;
|
||||
output << '\t' << '\t' << '\t' << "import execute._" << std::endl;
|
||||
for (auto const& pair : em_widths) {
|
||||
std::string regName = prefix + "_INTERMEDIATE_" + pair.first + "" + std::to_string(pair.second);
|
||||
output << '\t' << '\t' << '\t' << "insert(" << regName << ") := " << semantics[pair.first] << ".asBits" << std::endl;
|
||||
}
|
||||
output << '\t' << '\t' << "} // execute plug newArea" << std::endl;
|
||||
output << '\t' << '\t' << "memory plug new Area{" << std::endl;
|
||||
output << '\t' << '\t' << '\t' << "import memory._" << std::endl;
|
||||
// 2nd level MUXes
|
||||
for (const group* g : *groups) {
|
||||
if (g->opnames.size() > 1) {
|
||||
output << '\t' << '\t' << '\t' << "val val_" << g->name << " = input("<< ctrlString << g->name << ").mux(" << std::endl;
|
||||
for (auto it = g->opnames.begin() ; it != g->opnames.end() ; it++) {
|
||||
std::string opname = *it;
|
||||
std::string semantic = semantics[opname];
|
||||
std::string regName = prefix + "_INTERMEDIATE_" + opname + "" + std::to_string(em_widths[opname]);
|
||||
output << '\t' << '\t' << '\t' << '\t' << ctrlString << g->name << "Enum.CTRL_" << opname << " -> " << mem_semantics[opname] << "(input(" << regName << ")).asBits";
|
||||
if (std::next(it, 1) == g->opnames.end())
|
||||
output << std::endl;
|
||||
else
|
||||
output << "," << std::endl;
|
||||
}
|
||||
output << '\t' << '\t' << '\t' << ") // mux " << g->name << std::endl;
|
||||
}
|
||||
}
|
||||
// conditional last level mux
|
||||
output << '\t' << '\t' << '\t' << "when (arbitration.isValid && input(" << isString << ")) {" << std::endl;
|
||||
output << '\t' << '\t' << '\t' << '\t' << "output(REGFILE_WRITE_DATA) := input(" << ctrlString << ").mux(" << std::endl;
|
||||
for (auto it = groups->begin() ; it != groups->end() ; it++) {
|
||||
group* g = *it;
|
||||
if (g->opnames.size() > 1) {
|
||||
output << '\t' << '\t' << '\t' << '\t' <<'\t' << ctrlEnumString << "." << g->ctrlName() << " -> val_" << g->name << ".asBits";
|
||||
} else {
|
||||
std::string opname = *g->opnames.begin();
|
||||
std::string regName = prefix + "_INTERMEDIATE_" + opname + "" + std::to_string(em_widths[opname]);
|
||||
output << '\t' << '\t' << '\t' << '\t' << '\t' << ctrlEnumString << ".CTRL_" << opname << " -> " << mem_semantics[opname] << "(input(" << regName << ")).asBits(31 downto 0)";
|
||||
}
|
||||
if (std::next(it, 1) == groups->end())
|
||||
output << std::endl;
|
||||
else
|
||||
output << "," << std::endl;
|
||||
}
|
||||
output << '\t' << '\t' << '\t' << '\t' << ") // primary mux" << std::endl;
|
||||
if (wide) {
|
||||
output << '\t' << '\t' << '\t' << '\t' << "output(REGFILE_WRITE_DATA_ODD) := input(" << ctrlString << ").mux(" << std::endl;
|
||||
for (auto it = groups->begin() ; it != groups->end() ; it++) {
|
||||
group* g = *it;
|
||||
if (g->opnames.size() > 1) {
|
||||
output << '\t' << '\t' << '\t' << '\t' <<'\t' << ctrlEnumString << "." << g->ctrlName() << " -> val_" << g->name << ".asBits";
|
||||
} else {
|
||||
std::string opname = *g->opnames.begin();
|
||||
std::string regName = prefix + "_INTERMEDIATE_" + opname + "" + std::to_string(em_widths[opname]);
|
||||
output << '\t' << '\t' << '\t' << '\t' << '\t' << ctrlEnumString << ".CTRL_" << opname << " -> " << mem_semantics[opname] << "(input(" << regName << ")).asBits(63 downto 32)";
|
||||
}
|
||||
if (std::next(it, 1) == groups->end())
|
||||
output << std::endl;
|
||||
else
|
||||
output << "," << std::endl;
|
||||
}
|
||||
}
|
||||
output << '\t' << '\t' << '\t' << '\t' << ") // primary mux" << std::endl;
|
||||
output << '\t' << '\t' << '\t' << "} // when input is" << std::endl;
|
||||
output << '\t' << '\t' << "} // memory plug newArea" << std::endl;
|
||||
}
|
||||
output << '\t' << '\t' << "} // " << where << " plug newArea" << std::endl;
|
||||
output << '\t' << "} // override def build" << std::endl;
|
||||
output << "} // class Plugin" << std::endl;
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue