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Merge pull request #2099 from ThalesSiliconSecurity/corefix

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CORE-DV : Remove rd & rs2 from the cus_exc custom instruction
This commit is contained in:
André Sintzoff 2023-08-09 17:35:57 +02:00 • committed by GitHub
commit 1992be799d
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2 changed files with 11 additions and 7 deletions
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12
cva6/env/corev-dv/custom/cvxif_custom_instr.sv vendored
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@ -30,9 +30,7 @@ class cvxif_custom_instr extends riscv_custom_instr;
constraint cus_rx {
if (instr_name inside {CUS_EXC}) {
rd == 0;
rs1 inside {[0:9],[11:13],15};
rs2 == 0;
rs1 dist { [0:9] := 10, 10 := 2, [11:13] := 10, 14 := 2, 15 := 10, [16:23] := 2, [25:31] := 2 };
}
}
@ -47,7 +45,7 @@ class cvxif_custom_instr extends riscv_custom_instr;
CUS_NOP: asm_str = "cus_nop";
CUS_S_ADD: asm_str = $sformatf("%0s %0s, %0s, %0s", asm_str, rd.name(), rs1.name(), rs2.name());
CUS_U_ADD: asm_str = $sformatf("%0s %0s, %0s, %0s", asm_str, rd.name(), rs1.name(), rs2.name());
CUS_EXC: asm_str = $sformatf("%0s %0s, %0s, %0s", asm_str, rd.name(), rs1.name(), rs2.name());
CUS_EXC: asm_str = $sformatf("%0s %0s", asm_str, rs1.name());
endcase
comment = {get_instr_name(), " ", comment};
if (comment != "") begin
@ -96,7 +94,13 @@ class cvxif_custom_instr extends riscv_custom_instr;
case (instr_name) inside
"CUS_NOP": begin
has_rd = 1'b0;
has_rs1 = 1'b0;
has_rs2 = 1'b0;
has_imm = 1'b0;
end
"CUS_EXC": begin
has_rd = 1'b0;
has_rs1 = 1'b1;
has_rs2 = 1'b0;
has_imm = 1'b0;
end

6
cva6/env/corev-dv/user_extension/x_extn_user_define.h vendored
View file

@ -42,8 +42,8 @@
.insn r CUSTOM_3, 0x0, 0x8, \rd, \rs1, \rs2
.endm
# CUS_EXC rd, rs1, rs2 -> .insn r CUSTOM_3, 0x2, 0x60, rd, rs1, rs2
.macro cus_exc rd, rs1, rs2
.insn r CUSTOM_3, 0x2, 0x60, \rd, \rs1, \rs2
# CUS_EXC rs1 -> .insn r CUSTOM_3, 0x2, 0x60, x0, rs1, x0
.macro cus_exc rs1
.insn r CUSTOM_3, 0x2, 0x60, x0, \rs1, x0
.endm