Enable F extension for CV32 (#694)

Signed-off-by: Pranay Nath <pranay.nath@gmail.com>
This commit is contained in:
Pranay Nath 2021-07-30 20:54:17 +05:30 committed by GitHub
parent 5a19ef678f
commit 1eb23f8420
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
3 changed files with 6 additions and 3 deletions

View file

@ -162,8 +162,8 @@ package ariane_pkg;
localparam bit RVD = riscv::IS_XLEN64; // Is D extension enabled
`else
// Floating-point extensions configuration
localparam bit RVF = riscv::IS_XLEN64; // Is F extension enabled
localparam bit RVD = riscv::IS_XLEN64; // Is D extension enabled
localparam bit RVF = (riscv::IS_XLEN64 | riscv::IS_XLEN32) & riscv::FPU_EN; // Is F extension enabled for both 32 Bit and 64 bit CPU
localparam bit RVD = (riscv::IS_XLEN64 ? 1:0) & riscv::FPU_EN; // Is D extension enabled for only 64 bit CPU
`endif
localparam bit RVA = 1'b1; // Is A extension enabled

View file

@ -35,6 +35,7 @@ package riscv;
localparam VLEN = (XLEN == 32) ? 32 : 64; // virtual address length
localparam PLEN = (XLEN == 32) ? 32 : 56; // physical address length
localparam IS_XLEN32 = (XLEN == 32) ? 1'b1 : 1'b0;
localparam IS_XLEN64 = (XLEN == 32) ? 1'b0 : 1'b1;
localparam ModeW = (XLEN == 32) ? 1 : 4;
localparam ASIDW = (XLEN == 32) ? 9 : 16;
@ -43,6 +44,8 @@ package riscv;
localparam SV = (MODE_SV == ModeSv32) ? 32 : 39;
localparam VPN2 = (VLEN-31 < 8) ? VLEN-31 : 8;
localparam FPU_EN = 1'b1; // This bit is to select FPU in the design, FPU_EN = 1'b0 disables FPU in the design
typedef logic [XLEN-1:0] xlen_t;
// --------------------

View file

@ -51,7 +51,7 @@ module fpu_wrap import ariane_pkg::*; (
// Features (enabled formats, vectors etc.)
localparam fpnew_pkg::fpu_features_t FPU_FEATURES = '{
Width: 64,
Width: riscv::XLEN, // parameterized using XLEN
EnableVectors: ariane_pkg::XFVEC,
EnableNanBox: 1'b1,
FpFmtMask: {RVF, RVD, XF16, XF8, XF16ALT},