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https://github.com/openhwgroup/cva6.git
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🐛 Fix in exception not taken for loads
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parent
4b97fcb76d
commit
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3 changed files with 26 additions and 22 deletions
2
Makefile
2
Makefile
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@ -44,7 +44,7 @@ riscv-tests = rv64ui-p-add rv64ui-p-addi rv64ui-p-slli rv64ui-p-addiw rv64ui-p-a
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rv64mi-p-ma_addr rv64mi-p-ma_fetch rv64mi-p-sbreak rv64mi-p-scall \
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rv64si-p-csr rv64si-p-ma_fetch rv64si-p-scall rv64si-p-wfi rv64si-p-sbreak \
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rv64si-p-dirty rv64uc-p-rvc \
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rv64ui-v-sll
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rv64ui-v-sll rv64ui-v-srl rv64ui-v-sd
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riscv-test = rv64ui-p-add
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42
README.md
42
README.md
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@ -43,32 +43,32 @@ Check out the [contribution guide](CONTRIBUTING.md)
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## User Mode Integer Tests
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| **Test Name** | **P/V** | **Test Name** | **P/V** | **Test Name** | **P/V** |
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|---------------|-----------------------------------------|---------------|----------------------------------------|---------------|-----------------------------------------|
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| add | :white_check_mark: :white_large_square: | lb | :white_check_mark::white_large_square: | sll | :white_check_mark: :white_check_mark: |
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| addi | :white_check_mark: :white_large_square: | lbu | :white_check_mark::white_large_square: | slli | :white_check_mark: :white_large_square: |
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| addiw | :white_check_mark: :white_large_square: | ld | :white_check_mark::white_large_square: | slliw | :white_check_mark: :white_large_square: |
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| addw | :white_check_mark: :white_large_square: | lh | :white_check_mark::white_large_square: | sllw | :white_check_mark: :white_large_square: |
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| and | :white_check_mark: :white_large_square: | lhu | :white_check_mark::white_large_square: | slt | :white_check_mark: :white_large_square: |
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| andi | :white_check_mark: :white_large_square: | lui | :white_check_mark::white_large_square: | slti | :white_check_mark: :white_large_square: |
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| auipc | :white_check_mark: :white_large_square: | lw | :white_check_mark::white_large_square: | sltiu | :white_check_mark: :white_large_square: |
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| beq | :white_check_mark: :white_large_square: | lwu | :white_check_mark::white_large_square: | sltu | :white_check_mark: :white_large_square: |
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| bge | :white_check_mark: :white_large_square: | or | :white_check_mark::white_large_square: | sra | :white_check_mark: :white_large_square: |
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| bgeu | :white_check_mark: :white_large_square: | ori | :white_check_mark::white_large_square: | srai | :white_check_mark: :white_large_square: |
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| blt | :white_check_mark: :white_large_square: | sb | :white_check_mark::white_large_square: | sraiw | :white_check_mark: :white_large_square: |
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| bltu | :white_check_mark: :white_large_square: | sd | :white_check_mark::white_check_mark: | sraw | :white_check_mark: :white_large_square: |
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| bne | :white_check_mark: :white_large_square: | sh | :white_check_mark::white_large_square: | srl | :white_check_mark: :white_check_mark: |
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| sub | :white_check_mark: :white_large_square: | simple | :white_check_mark::white_large_square: | srli | :white_check_mark: :white_large_square: |
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| subw | :white_check_mark: :white_large_square: | jal | :white_check_mark::white_large_square: | srliw | :white_check_mark: :white_large_square: |
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| sw | :white_check_mark: :white_large_square: | jalr | :white_check_mark::white_large_square: | srlw | :white_check_mark: :white_large_square: |
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| xor | :white_check_mark: :white_large_square: | | | | |
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| xori | :white_check_mark: :white_large_square: | | | | |
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| **Test Name** | **P/V** | **Test Name** | **P/V** | **Test Name** | **P/V** |
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|---------------|-----------------------------------------|---------------|-----------------------------------------|---------------|-----------------------------------------|
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| add | :white_check_mark: :white_large_square: | lb | :white_check_mark: :white_large_square: | sll | :white_check_mark: :white_check_mark: |
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| addi | :white_check_mark: :white_large_square: | lbu | :white_check_mark: :white_large_square: | slli | :white_check_mark: :white_large_square: |
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| addiw | :white_check_mark: :white_large_square: | ld | :white_check_mark: :white_check_mark: | slliw | :white_check_mark: :white_large_square: |
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| addw | :white_check_mark: :white_large_square: | lh | :white_check_mark: :white_large_square: | sllw | :white_check_mark: :white_large_square: |
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| and | :white_check_mark: :white_large_square: | lhu | :white_check_mark: :white_large_square: | slt | :white_check_mark: :white_large_square: |
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| andi | :white_check_mark: :white_large_square: | lui | :white_check_mark: :white_large_square: | slti | :white_check_mark: :white_large_square: |
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| auipc | :white_check_mark: :white_large_square: | lw | :white_check_mark: :white_large_square: | sltiu | :white_check_mark: :white_large_square: |
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| beq | :white_check_mark: :white_large_square: | lwu | :white_check_mark: :white_large_square: | sltu | :white_check_mark: :white_large_square: |
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| bge | :white_check_mark: :white_large_square: | or | :white_check_mark: :white_large_square: | sra | :white_check_mark: :white_large_square: |
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| bgeu | :white_check_mark: :white_large_square: | ori | :white_check_mark: :white_large_square: | srai | :white_check_mark: :white_large_square: |
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| blt | :white_check_mark: :white_large_square: | sb | :white_check_mark: :white_large_square: | sraiw | :white_check_mark: :white_large_square: |
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| bltu | :white_check_mark: :white_large_square: | sd | :white_check_mark: :white_check_mark: | sraw | :white_check_mark: :white_large_square: |
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| bne | :white_check_mark: :white_large_square: | sh | :white_check_mark: :white_large_square: | srl | :white_check_mark: :white_check_mark: |
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| sub | :white_check_mark: :white_large_square: | simple | :white_check_mark: :white_large_square: | srli | :white_check_mark: :white_large_square: |
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| subw | :white_check_mark: :white_large_square: | jal | :white_check_mark: :white_large_square: | srliw | :white_check_mark: :white_large_square: |
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| sw | :white_check_mark: :white_large_square: | jalr | :white_check_mark: :white_large_square: | srlw | :white_check_mark: :white_large_square: |
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| xor | :white_check_mark: :white_large_square: | | | | |
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| xori | :white_check_mark: :white_large_square: | | | | |
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## Compressed Instruction Tests
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| **Test Name** | **P/V** | **Test Name** | **P/V** | **Test Name** | **P/V** |
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|---------------|----------------------------------------|---------------|---------|---------------|---------|
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| rvc | :white_check_mark::white_large_square: | | | | |
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| rvc | :white_check_mark: :white_large_square: | | | | |
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## Machine Mode Tests
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@ -248,6 +248,10 @@ module load_unit (
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if (ex_i.valid)
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valid_o = 1'b1;
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end
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// an exception occurred during translation
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if (CS == WAIT_TRANSLATION && ex_i.valid) begin
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valid_o = 1'b1;
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end
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end
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