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.gitignore
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*.swp
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*.swo
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site/*
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*.ucdb
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covhtmlreport/*
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@ -4,5 +4,12 @@ CV32A60X documentation
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.. toctree::
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:maxdepth: 1
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..
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riscv/unpriv.rst
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riscv/priv.rst
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Below are links to RISC-V ISA documents tailored for OpenHW Group CV32A60X.
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Only those CSRs and Instruction Sets that are supported by the CV32A60X are documented here.
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| `Unprivileged RISC-V ISA <https://cva6-cv32a60x.readthedocs.io/en/latest/07_cv32a60x/riscv/unpriv.html>`_
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| `Privileged RISC-V ISA <https://cva6-cv32a60x.readthedocs.io/en/latest/07_cv32a60x/riscv/priv.html>`_
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