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Make D independent on xlen (#2005)

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A 64-bit core might very well support just single-precision.
This commit is contained in:
Florian Zaruba 2024-05-12 20:15:50 +02:00 • committed by GitHub
parent 73590010e6
commit 9f40ad57cb
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GPG key ID: B5690EEEBB952194
18 changed files with 19 additions and 2 deletions
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2
core/fpu_wrap.sv
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@ -61,7 +61,7 @@ module fpu_wrap
// Features (enabled formats, vectors etc.)
localparam fpnew_pkg::fpu_features_t FPU_FEATURES = '{
Width: unsigned'(CVA6Cfg.XLEN), // parameterized using CVA6Cfg.XLEN
Width: unsigned'(CVA6Cfg.FLen), // parameterized using CVA6Cfg.FLen
EnableVectors: CVA6Cfg.XFVec,
EnableNanBox: 1'b1,
FpFmtMask: {CVA6Cfg.RVF, CVA6Cfg.RVD, CVA6Cfg.XF16, CVA6Cfg.XF8, CVA6Cfg.XF16ALT},

2
core/include/build_config_pkg.sv
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@ -4,7 +4,7 @@ package build_config_pkg;
bit IS_XLEN32 = (CVA6Cfg.XLEN == 32) ? 1'b1 : 1'b0;
bit IS_XLEN64 = (CVA6Cfg.XLEN == 32) ? 1'b0 : 1'b1;
bit RVF = (IS_XLEN64 | IS_XLEN32) & CVA6Cfg.FpuEn;
bit RVD = (IS_XLEN64 ? 1 : 0) & CVA6Cfg.FpuEn;
bit RVD = (IS_XLEN64 ? 1 : 0) & CVA6Cfg.FpuEn & CVA6Cfg.RVD;
bit FpPresent = RVF | RVD | CVA6Cfg.XF16 | CVA6Cfg.XF16ALT | CVA6Cfg.XF8;
bit NSX = CVA6Cfg.XF16 | CVA6Cfg.XF16ALT | CVA6Cfg.XF8 | CVA6Cfg.XFVec; // Are non-standard extensions present?
int unsigned FLen = RVD ? 64 : // D ext.

2
core/include/config_pkg.sv
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@ -66,6 +66,8 @@ package config_pkg;
bit RVZiCond;
// Floating Point
bit FpuEn;
// Floating Point
bit RVD;
// Non standard 16bits Floating Point extension
bit XF16;
// Non standard 16bits Floating Point Alt extension

1
core/include/cv32a60x_config_pkg.sv
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@ -88,6 +88,7 @@ package cva6_config_pkg;
MemTidWidth: unsigned'(CVA6ConfigMemTidWidth),
NrLoadBufEntries: unsigned'(CVA6ConfigNrLoadBufEntries),
FpuEn: bit'(CVA6ConfigFpuEn),
RVD: bit'(CVA6ConfigFpuEn),
XF16: bit'(CVA6ConfigF16En),
XF16ALT: bit'(CVA6ConfigF16AltEn),
XF8: bit'(CVA6ConfigF8En),

1
core/include/cv32a65x_config_pkg.sv
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@ -45,6 +45,7 @@ package cva6_config_pkg;
MemTidWidth: unsigned'(2),
NrLoadBufEntries: unsigned'(CVA6ConfigNrLoadBufEntries),
FpuEn: bit'(0),
RVD: bit'(0),
XF16: bit'(0),
XF16ALT: bit'(0),
XF8: bit'(0),

1
core/include/cv32a6_embedded_config_pkg.sv
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@ -87,6 +87,7 @@ package cva6_config_pkg;
MemTidWidth: unsigned'(CVA6ConfigMemTidWidth),
NrLoadBufEntries: unsigned'(CVA6ConfigNrLoadBufEntries),
FpuEn: bit'(CVA6ConfigFpuEn),
RVD: bit'(CVA6ConfigFpuEn),
XF16: bit'(CVA6ConfigF16En),
XF16ALT: bit'(CVA6ConfigF16AltEn),
XF8: bit'(CVA6ConfigF8En),

1
core/include/cv32a6_ima_sv32_fpga_config_pkg.sv
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@ -88,6 +88,7 @@ package cva6_config_pkg;
MemTidWidth: unsigned'(CVA6ConfigMemTidWidth),
NrLoadBufEntries: unsigned'(CVA6ConfigNrLoadBufEntries),
FpuEn: bit'(CVA6ConfigFpuEn),
RVD: bit'(CVA6ConfigFpuEn),
XF16: bit'(CVA6ConfigF16En),
XF16ALT: bit'(CVA6ConfigF16AltEn),
XF8: bit'(CVA6ConfigF8En),

1
core/include/cv32a6_imac_sv0_config_pkg.sv
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@ -88,6 +88,7 @@ package cva6_config_pkg;
MemTidWidth: unsigned'(CVA6ConfigMemTidWidth),
NrLoadBufEntries: unsigned'(CVA6ConfigNrLoadBufEntries),
FpuEn: bit'(CVA6ConfigFpuEn),
RVD: bit'(CVA6ConfigFpuEn),
XF16: bit'(CVA6ConfigF16En),
XF16ALT: bit'(CVA6ConfigF16AltEn),
XF8: bit'(CVA6ConfigF8En),

1
core/include/cv32a6_imac_sv32_config_pkg.sv
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@ -88,6 +88,7 @@ package cva6_config_pkg;
MemTidWidth: unsigned'(CVA6ConfigMemTidWidth),
NrLoadBufEntries: unsigned'(CVA6ConfigNrLoadBufEntries),
FpuEn: bit'(CVA6ConfigFpuEn),
RVD: bit'(CVA6ConfigFpuEn),
XF16: bit'(CVA6ConfigF16En),
XF16ALT: bit'(CVA6ConfigF16AltEn),
XF8: bit'(CVA6ConfigF8En),

1
core/include/cv32a6_imafc_sv32_config_pkg.sv
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@ -88,6 +88,7 @@ package cva6_config_pkg;
MemTidWidth: unsigned'(CVA6ConfigMemTidWidth),
NrLoadBufEntries: unsigned'(CVA6ConfigNrLoadBufEntries),
FpuEn: bit'(CVA6ConfigFpuEn),
RVD: bit'(CVA6ConfigFpuEn),
XF16: bit'(CVA6ConfigF16En),
XF16ALT: bit'(CVA6ConfigF16AltEn),
XF8: bit'(CVA6ConfigF8En),

1
core/include/cv64a6_imadfcv_sv39_polara_config_pkg.sv
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@ -88,6 +88,7 @@ package cva6_config_pkg;
MemTidWidth: unsigned'(CVA6ConfigMemTidWidth),
NrLoadBufEntries: unsigned'(CVA6ConfigNrLoadBufEntries),
FpuEn: bit'(CVA6ConfigFpuEn),
RVD: bit'(CVA6ConfigFpuEn),
XF16: bit'(CVA6ConfigF16En),
XF16ALT: bit'(CVA6ConfigF16AltEn),
XF8: bit'(CVA6ConfigF8En),

1
core/include/cv64a6_imafdc_sv39_config_pkg.sv
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@ -88,6 +88,7 @@ package cva6_config_pkg;
MemTidWidth: unsigned'(CVA6ConfigMemTidWidth),
NrLoadBufEntries: unsigned'(CVA6ConfigNrLoadBufEntries),
FpuEn: bit'(CVA6ConfigFpuEn),
RVD: bit'(CVA6ConfigFpuEn),
XF16: bit'(CVA6ConfigF16En),
XF16ALT: bit'(CVA6ConfigF16AltEn),
XF8: bit'(CVA6ConfigF8En),

1
core/include/cv64a6_imafdc_sv39_hpdcache_config_pkg.sv
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@ -95,6 +95,7 @@ package cva6_config_pkg;
MemTidWidth: unsigned'(CVA6ConfigMemTidWidth),
NrLoadBufEntries: unsigned'(CVA6ConfigNrLoadBufEntries),
FpuEn: bit'(CVA6ConfigFpuEn),
RVD: bit'(CVA6ConfigFpuEn),
XF16: bit'(CVA6ConfigF16En),
XF16ALT: bit'(CVA6ConfigF16AltEn),
XF8: bit'(CVA6ConfigF8En),

1
core/include/cv64a6_imafdc_sv39_openpiton_config_pkg.sv
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@ -88,6 +88,7 @@ package cva6_config_pkg;
MemTidWidth: unsigned'(CVA6ConfigMemTidWidth),
NrLoadBufEntries: unsigned'(CVA6ConfigNrLoadBufEntries),
FpuEn: bit'(CVA6ConfigFpuEn),
RVD: bit'(CVA6ConfigFpuEn),
XF16: bit'(CVA6ConfigF16En),
XF16ALT: bit'(CVA6ConfigF16AltEn),
XF8: bit'(CVA6ConfigF8En),

1
core/include/cv64a6_imafdc_sv39_wb_config_pkg.sv
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@ -88,6 +88,7 @@ package cva6_config_pkg;
MemTidWidth: unsigned'(CVA6ConfigMemTidWidth),
NrLoadBufEntries: unsigned'(CVA6ConfigNrLoadBufEntries),
FpuEn: bit'(CVA6ConfigFpuEn),
RVD: bit'(CVA6ConfigFpuEn),
XF16: bit'(CVA6ConfigF16En),
XF16ALT: bit'(CVA6ConfigF16AltEn),
XF8: bit'(CVA6ConfigF8En),

1
core/include/cv64a6_imafdch_sv39_config_pkg.sv
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@ -88,6 +88,7 @@ package cva6_config_pkg;
MemTidWidth: unsigned'(CVA6ConfigMemTidWidth),
NrLoadBufEntries: unsigned'(CVA6ConfigNrLoadBufEntries),
FpuEn: bit'(CVA6ConfigFpuEn),
RVD: bit'(CVA6ConfigFpuEn),
XF16: bit'(CVA6ConfigF16En),
XF16ALT: bit'(CVA6ConfigF16AltEn),
XF8: bit'(CVA6ConfigF8En),

1
core/include/cv64a6_imafdch_sv39_wb_config_pkg.sv
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@ -88,6 +88,7 @@ package cva6_config_pkg;
MemTidWidth: unsigned'(CVA6ConfigMemTidWidth),
NrLoadBufEntries: unsigned'(CVA6ConfigNrLoadBufEntries),
FpuEn: bit'(CVA6ConfigFpuEn),
RVD: bit'(CVA6ConfigFpuEn),
XF16: bit'(CVA6ConfigF16En),
XF16ALT: bit'(CVA6ConfigF16AltEn),
XF8: bit'(CVA6ConfigF8En),

1
core/include/cv64a6_imafdcv_sv39_config_pkg.sv
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@ -88,6 +88,7 @@ package cva6_config_pkg;
MemTidWidth: unsigned'(CVA6ConfigMemTidWidth),
NrLoadBufEntries: unsigned'(CVA6ConfigNrLoadBufEntries),
FpuEn: bit'(CVA6ConfigFpuEn),
RVD: bit'(CVA6ConfigFpuEn),
XF16: bit'(CVA6ConfigF16En),
XF16ALT: bit'(CVA6ConfigF16AltEn),
XF8: bit'(CVA6ConfigF8En),