FENCE as NOP and 🐛 in flush CSR

include/ariane_pkg.svh

@@ -228,6 +228,9 @@ package ariane_pkg;
     localparam ENV_CALL_SMODE        = 64'h9; // environment call from supervisor mode
     localparam ENV_CALL_MMODE        = 64'hB; // environment call from machine mode
 
+    // -----
+    // CSRs
+    // -----
     typedef enum logic [11:0] {
         CSR_SSTATUS   = 12'h100,
         CSR_SIE       = 12'h104,
@@ -256,7 +259,7 @@ package ariane_pkg;
         CSR_MHARTID   = 12'hF14
     } csr_reg_t;
 
-    // decoded csr address
+    // decoded CSR address
     typedef struct packed {
         logic [1:0]  rw;
         priv_lvl_t   priv_lvl;

src/btb.sv

@@ -87,7 +87,8 @@ module btb #(
             btb_n[update_pc].target_address = branch_predict_i.target_address;
             // as is the information whether this was a compressed branch
             btb_n[update_pc].is_lower_16    = branch_predict_i.is_lower_16;
-            // check if we should invalidate this entry
+            // check if we should invalidate this entry, this happens in case we predicted a branch
+            // where actually none-is (aliasing)
             if (branch_predict_i.clear) begin
                 btb_n[update_pc].valid = 1'b0;
             end

src/csr_buffer.sv

@@ -72,6 +72,9 @@ module csr_buffer (
         if (commit_i && ~csr_valid_i) begin
             csr_reg_n.valid       = 1'b0;
         end
+        // clear the buffer if we flushed
+        if (flush_i)
+            csr_reg_n.valid       = 1'b0;
     end
     // sequential process
     always_ff @(posedge clk_i or negedge rst_ni) begin

src/decoder.sv

@@ -173,7 +173,12 @@ module decoder (
                 OPCODE_FENCE: begin
                     // TODO: Implement
                     // FENCE, FENCE.I
-                    illegal_instr = 1'b1;
+                    // Implement as NOP
+                    instruction_o.fu  = ALU;
+                    instruction_o.op  = ADD;
+                    instruction_o.rs1 = '0;
+                    instruction_o.rs2 = '0;
+                    instruction_o.rd  = '0;
                 end
 
                 // --------------------------