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Merge pull request #2078 from ThalesSiliconSecurity/test_isa

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ISACOV : switch beq instruction register
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JeanRochCoulon 2023-07-26 14:56:20 +02:00 • committed by GitHub
commit fa24d9f122
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cva6/tests/custom/isacov/branch_to_zero.S
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@ -39,7 +39,7 @@ branch2:
branch3:
bltu a1, a1, branch3
branch4:
beq a1, zero, branch4
beq zero, a1, branch4
branch5:
bne t5, t5, branch5
addi a0, a0, 22