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csr_regfile : condition RTL to improve code coverage

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Ayoub Jalali 2025-03-18 11:44:38 +01:00
parent 79ad41dc44
commit fac99d2ccf
1 changed files with 1 additions and 1 deletions
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core/csr_regfile.sv
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@ -2613,7 +2613,7 @@ module csr_regfile
wfi_q <= 1'b0;
// pmp
for (int i = 0; i < 64; i++) begin
if (i < CVA6Cfg.NrPMPEntries) begin
if (CVA6Cfg.NrPMPEntries != 0 && i < CVA6Cfg.NrPMPEntries) begin
pmpcfg_q[i] <= riscv::pmpcfg_t'(CVA6Cfg.PMPCfgRstVal[i]);
pmpaddr_q[i] <= CVA6Cfg.PMPAddrRstVal[i][CVA6Cfg.PLEN-3:0];
end else begin