9 commits

Author	SHA1	Message	Date
slgth	e9648eaf8c	Design documentation: AsciiDoc conversion (#2399)	2024-07-25 17:18:27 +02:00
slgth	3deb95af21	cv64a6_mmu: add RISC-V ISA documentation to main page (#2393)	2024-07-25 08:37:27 +02:00
slgth	f57a6c0106	Move CV32A65X documentation into its own chapter (#2236)	2024-06-11 18:01:25 +02:00
André Sintzoff	c52fd2b2c9	Provide RISC-V ISA priv in ReadTheDocs (#2093) ... * Provide RISC-V ISA for CV32A65X * Reorder specifications in ReadTheDocs	2024-05-02 15:20:09 +02:00
JeanRochCoulon	9d0c700f42	port_builder generates the table of ports (#1805)	2024-02-06 12:06:13 +01:00
Mike Thompson	f46c5b1acc	Integrate CV32A6 Design Document and break out CVA6 APU (#1072)	2023-02-21 15:21:04 +01:00
Mike Thompson	bf5a74cae5	[skip ci] Add hierarchy to the CVA6 documentation (#995) ... * Clarify scope of Verilator model Signed-off-by: Mike Thompson <mike@openhwgroup.org> * Update repo user docs Signed-off-by: Mike Thompson <mike@openhwgroup.org> * Update repo user docs Signed-off-by: Mike Thompson <mike@openhwgroup.org> * CORE-V not COREV Signed-off-by: Mike Thompson <mike@openhwgroup.org> * First release is v0.1.0 Signed-off-by: Mike Thompson <mike@openhwgroup.org> * Fix typo Signed-off-by: Mike Thompson <mike@openhwgroup.org> * Create documentation hierarchy Signed-off-by: Mike Thompson <mike@openhwgroup.org> Signed-off-by: Mike Thompson <mike@openhwgroup.org>	2022-11-16 11:19:37 -05:00
Nils Wistoff	163eb93947	docs: add documentation for SoC ... * Memory Map * PLIC interrupt sources Signed-off-by: Nils Wistoff <nwistoff@iis.ee.ethz.ch>	2020-12-01 15:04:15 +01:00
Florian Zaruba	f8481cb54e	doc: Move to read the docs	2020-07-26 13:38:15 +02:00