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JeanRochCoulon-patch-1

JeanRochCoulon-patch-2

JeanRochCoulon-patch-9

cea

cv32a60x

cv32a6_v5.0.0

dependabot/submodules/verif/core-v-verif-65593a9

feature/gsoc

feature/interconnect

feature/interconnect.backup

feature/pmp_when_no_mmu

feature/scratchpads

master

master_candidate

revert-2563-VLEN

v5.0.x

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20240827.feature.interconnect

bsc-3-10-18

cv32a60x-v6.0.0

v4.0.0

v4.1.0

v4.1.1

v4.1.2

v4.2.0

v5.0.0

v5.0.1

v5.1.0

v5.2.0

v5.3.0

68a44c96bb

Merge 75efafd256 into ed24d814eb Riccardo Tedeschi 2025-06-27 16:13:57 +00:00
75efafd256 instr_tracer: add fixes for superscalar configuration Riccardo Tedeschi 2025-06-27 17:35:15 +02:00
1afbf0eb2f

Merge 15ee1e41f1 into ed24d814eb dependabot[bot] 2025-06-26 21:54:30 +00:00
31414987be

Merge 2c780039ed into ed24d814eb MaxCThales 2025-06-26 21:53:18 +00:00
7bc925f704

Merge a5b561f9d7 into ed24d814eb Ben Dooks 2025-06-26 21:53:09 +00:00
ab50e73982

Merge 2b119ce5fd into ed24d814eb Nazar Kazakov 2025-06-26 17:43:35 +00:00
2b119ce5fd Fix typos Nazar Kazakov 2025-06-25 15:59:26 +01:00
60c2dd52e5

Merge 4920943eae into ed24d814eb Cesar Fuguet 2025-06-26 06:23:39 +00:00
4920943eae

Merge branch 'master' into dev/updt_hpdcache JeanRochCoulon 2025-06-26 08:23:35 +02:00
6b469b5449

Merge 7882136f84 into ed24d814eb Lawrence Hunter 2025-06-26 00:27:22 +02:00
5a3c04eb8b Convert CRLF to LF in CVX_Interface_Coprocessor.rst Nazar Kazakov 2025-06-25 16:38:01 +01:00
98db5b3e33

Merge fff4bcbeb7 into ed24d814eb Riccardo Tedeschi 2025-06-25 15:08:22 +02:00
fff4bcbeb7

Merge branch 'master' into rt/alu-bypass Riccardo Tedeschi 2025-06-25 15:08:18 +02:00
0388dacb76

Merge f8f896c168 into ed24d814eb RoanR 2025-06-25 14:12:41 +03:00
61784c4550

Merge 03345cbda8 into ed24d814eb Isaar Ahmad 2025-06-25 08:32:01 +01:00
378b5138b6

Merge 821803f812 into ed24d814eb Andreas Korb 2025-06-25 08:52:48 +02:00
821803f812 fpga: bootrom: Fix definition and declaration mismatch of function Andreas Korb 2025-06-25 08:49:07 +02:00
532950b676

Merge a0780e604c into ed24d814eb Riccardo Tedeschi 2025-06-25 08:27:19 +02:00
a0780e604c

Merge branch 'master' into rt/tlb-fix JeanRochCoulon 2025-06-25 08:27:16 +02:00
2126120763

Merge c09d56c0f3 into ed24d814eb Cesar Fuguet 2025-06-25 07:08:56 +02:00
ed24d814eb

bht2lvl: refactor code to work with Verilator (#3028) master Riccardo Tedeschi 2025-06-25 00:19:03 +02:00
1276fe65a8 bht2lvl: refactor code to work with Verilator Riccardo Tedeschi 2025-06-24 14:11:10 +02:00
9cd8336c4d Integration of MPT into Load Unit and Store Unit Valedd99 2025-06-24 12:59:58 +02:00
c635cf580f clean comments master_candidate Casamatta Yannick 2025-06-24 12:03:56 +02:00
87cf2ec79c gitlab-ci, FPGA build + synthesis 2 config: cv32a60x / cv32a65x_axi Yannick Casamatta 2025-06-19 14:46:05 +02:00
597d3aa064 Makefile UVM, add option to set HPDCACHE_ASSERT_OFF Yannick Casamatta 2025-06-18 22:17:53 +02:00
4142037aea gitlab-ci, benchmark 4 config: cv32a60x/65x/60x_axi/65x_axi Yannick Casamatta 2025-06-18 21:32:43 +02:00
53f02628be gitlab-ci, spyglass on 4 config: cv32a60x/65x/60x_axi/65x_axi Yannick Casamatta 2025-06-18 21:31:36 +02:00
77a4b05ec8 add spyglass configuration files for cva6_example_axi target Yannick Casamatta 2025-06-18 21:24:29 +02:00
1860433303 gitlab-ci: add regression AXI Yannick Casamatta 2025-06-18 18:53:48 +02:00
30c63f14f3 New cva6_user_cfg AXI: cv32a60x_axi & cv32a65x_axi, based on cv32a60x/65x (OBI) Yannick Casamatta 2025-06-18 18:39:45 +02:00
133f8eb5d3 CVA6ConfigAxiIdWidth set at x5 to match HPDCACHE requirements Yannick Casamatta 2025-06-18 18:35:35 +02:00
d1f53ebfba hpdcache_user_cfg_t: Initialize all fields Yannick Casamatta 2025-06-18 18:32:55 +02:00
94dda2f7bf fix cv32a60x/cv32a65x user config - DcacheByteSize @ 2048 Cesar Fuguet 2025-06-18 15:09:42 +02:00
7e34ee5077 remove unused MemTidWidth parameter in CVA6Cfg structure Cesar Fuguet 2025-06-16 23:39:31 +02:00
154672723d Add option to enable assertions in the Verilator testbench Cesar Fuguet 2025-06-17 13:34:30 +02:00
cefe4f2911 config: allow to select diferent flavors of the HPDcache Cesar Fuguet 2025-06-16 23:11:35 +02:00
5282634650 replace icache by hpicache Cesar Fuguet 2025-06-15 19:18:27 +02:00
abcdabcba0 add spyglass configuration files for cva6_example_obi target Yannick Casamatta 2025-06-11 23:47:56 +02:00
b27ed5f79f default standalone cva6 synth & spyglass is done on OBI example wraper Yannick Casamatta 2025-06-11 20:17:14 +02:00
742e11886c Cva6 config: DataUserEn & FetchUserEn type move from uint to bit Cesar Fuguet 2025-06-16 16:22:07 +02:00
0ab8dc414a Makefile: fix verilator double compilation of core/cva6_rvfi.sv Cesar Fuguet 2025-06-16 16:19:48 +02:00
8ed065bfb0 fix: wrong assignment to vsstatus.fs Cesar Fuguet 2025-06-16 16:15:48 +02:00
26abf9d91c Add example wrapper with correct NOC type definition to allow spyglass & synth to be done on CVA6 IP Yannick Casamatta 2025-06-11 19:46:57 +02:00
2cf4ad55f1 move data size gen from cache to pipeline Yannick Casamatta 2025-06-11 19:05:45 +02:00
4534c3a23c Verible + new types axi/obi/ypb/rvfi management Yannick Casamatta 2025-06-11 14:05:43 +02:00
b254345ae5 CVA6 OBI/AXI selection - new internal YPB interfaces Yannick Casamatta 2025-06-10 23:54:07 +02:00
11378db682 [Zcmt] Implementation to OBI bus AbdessamiiOukalrazqou 2025-06-11 22:21:16 +02:00
6acd9d9bbc [Zcmt] Add uvm agent to test Zcmt extention with OBI AbdessamiiOukalrazqou 2025-04-25 18:47:13 +02:00
b47f33e68c clean comments Casamatta Yannick 2025-06-24 12:03:56 +02:00
ef6cc993c8 cva6_tlb: fix wrong indexing of vaddr_vpn_match when RVH is set Riccardo Tedeschi 2025-06-24 09:24:43 +02:00
54e3564b77

Bump core/cache_subsystem/hpdcache from 04de808 to dc006a1 dependabot[bot] 2025-06-23 19:31:22 +00:00
c03dc38479 gitlab-ci, FPGA build + synthesis 2 config: cv32a60x / cv32a65x_axi Yannick Casamatta 2025-06-19 14:46:05 +02:00
f8f896c168 OpenOCD: Update config syntax Roan Richmond 2025-06-19 16:30:31 +01:00
be346abc9e Makefile UVM, add option to set HPDCACHE_ASSERT_OFF Yannick Casamatta 2025-06-18 22:17:53 +02:00
8a6d354af0 gitlab-ci, benchmark 4 config: cv32a60x/65x/60x_axi/65x_axi Yannick Casamatta 2025-06-18 21:32:43 +02:00
894bb659b1 gitlab-ci, spyglass on 4 config: cv32a60x/65x/60x_axi/65x_axi Yannick Casamatta 2025-06-18 21:31:36 +02:00
02e787797c add spyglass configuration files for cva6_example_axi target Yannick Casamatta 2025-06-18 21:24:29 +02:00
2adf4cbfc8 gitlab-ci: add regression AXI Yannick Casamatta 2025-06-18 18:53:48 +02:00
280dcccdd1 New cva6_user_cfg AXI: cv32a60x_axi & cv32a65x_axi, based on cv32a60x/65x (OBI) Yannick Casamatta 2025-06-18 18:39:45 +02:00
90036e5273 gitlab-ci: update dhrystone figures for cv32a65x Riccardo Tedeschi 2025-06-19 12:24:28 +02:00
6d8d0e8a85 superscalar: add ALU-ALU bypass Riccardo Tedeschi 2025-06-19 12:23:55 +02:00
b5861e75f1 CVA6ConfigAxiIdWidth set at x5 to match HPDCACHE requirements Yannick Casamatta 2025-06-18 18:35:35 +02:00
ad7436203a hpdcache_user_cfg_t: Initialize all fields Yannick Casamatta 2025-06-18 18:32:55 +02:00
6da2ec0c4f fix cv32a60x/cv32a65x user config - DcacheByteSize @ 2048 Cesar Fuguet 2025-06-18 15:09:42 +02:00
77732360f9 remove unused MemTidWidth parameter in CVA6Cfg structure Cesar Fuguet 2025-06-16 23:39:31 +02:00
f01a036402 Add option to enable assertions in the Verilator testbench Cesar Fuguet 2025-06-17 13:34:30 +02:00
086e8ea75f config: allow to select diferent flavors of the HPDcache Cesar Fuguet 2025-06-16 23:11:35 +02:00
ec704ca756 replace icache by hpicache Cesar Fuguet 2025-06-15 19:18:27 +02:00
000059c122 add spyglass configuration files for cva6_example_obi target Yannick Casamatta 2025-06-11 23:47:56 +02:00
df9ec5f770 default standalone cva6 synth & spyglass is done on OBI example wraper Yannick Casamatta 2025-06-11 20:17:14 +02:00
add242bc0b Cva6 config: DataUserEn & FetchUserEn type move from uint to bit Cesar Fuguet 2025-06-16 16:22:07 +02:00
9488e9ce92 Makefile: fix verilator double compilation of core/cva6_rvfi.sv Cesar Fuguet 2025-06-16 16:19:48 +02:00
f9acd8f0e3 fix: wrong assignment to vsstatus.fs Cesar Fuguet 2025-06-16 16:15:48 +02:00
ce8c8c8191 Add example wrapper with correct NOC type definition to allow spyglass & synth to be done on CVA6 IP Yannick Casamatta 2025-06-11 19:46:57 +02:00
3e3e6374f9 move data size gen from cache to pipeline Yannick Casamatta 2025-06-11 19:05:45 +02:00
bc9e417c4d Verible + new types axi/obi/ypb/rvfi management Yannick Casamatta 2025-06-11 14:05:43 +02:00
4d08957604 CVA6 OBI/AXI selection - new internal YPB interfaces Yannick Casamatta 2025-06-10 23:54:07 +02:00
3e88187c8d

Merge branch 'master' into dev/updt_hpdcache JeanRochCoulon 2025-06-18 16:42:30 +02:00
301d11ceb8

MMU: H-Mode TLB fix (#2933) Nicolas Derumigny 2025-06-18 16:33:02 +02:00
606b7588d4

Merge branch 'master' into dev/nderumig/fix-mmu JeanRochCoulon 2025-06-18 08:16:37 +02:00
c76b568bbd

PTW: Coding style + H-Mode fixes (#2978) Nicolas Derumigny 2025-06-18 08:14:32 +02:00
7c165e8205

Merge branch 'master' into dev/nderumigny/ptw-coding-style JeanRochCoulon 2025-06-18 07:14:29 +02:00
c09d56c0f3

Update report_benchmark.py JeanRochCoulon 2025-06-17 17:24:36 +02:00
ef0e02bc21

Update report_benchmark.py JeanRochCoulon 2025-06-17 14:44:09 +02:00
8c88b67af1

Merge branch 'master' into fix/refill_fifo_depth JeanRochCoulon 2025-06-17 08:10:41 +02:00
2c780039ed

Merge branch 'master' into iti-fixes JeanRochCoulon 2025-06-17 08:09:56 +02:00
b484f5f3ee

dtlb_lu_access is done only when misalgined ex valid is 0 (#2989) khandelwaltanuj 2025-06-17 08:00:48 +02:00
ec224d5179

Merge branch 'master' into master JeanRochCoulon 2025-06-17 06:56:55 +02:00
e73c11d253

Bump core/cache_subsystem/hpdcache from 04de808 to 882aba1 dependabot[bot] 2025-06-16 18:32:28 +00:00
906e3b8933 fix(mmu): update conding style according to reviews Nicolas Derumigny 2025-06-16 18:18:50 +02:00
f3d2ec4461

remove rr_arb_tree from raw_checker (#3009) Côme 2025-06-16 11:52:17 +02:00
a5b561f9d7

Merge branch 'master' into bjdooks/update-mimpid-post-fs-fix2 Ben Dooks 2025-06-16 10:21:15 +01:00
617ae6249e

Merge branch 'master' into inline-last-index JeanRochCoulon 2025-06-16 10:52:21 +02:00
be85569cfc

Merge branch 'master' into iti-fixes JeanRochCoulon 2025-06-16 10:52:06 +02:00
d307eed25d

bootrom: fix CC/OBJCOPY setting (#2984) Ben Dooks 2025-06-16 09:51:34 +01:00
3c18cb311e

Merge branch 'master' into bjdooks/fix-makefile-cc JeanRochCoulon 2025-06-16 09:34:12 +02:00
317ce4cfd0

Merge branch 'master' into tale_of_two_controllers ibooga 2025-06-13 16:55:01 -07:00
bc8494a844 WT_CLN apparently passing sv32: For our 2KB fully associative cache: - Cache Size: 2KB (2048 bytes) - Line Size: 16 bytes (128 bits) - Total Lines: 128 lines - Associativity: 128-way (single set with all lines as ways) ibooga 2025-06-13 16:49:09 -07:00
975305b914 Set MMIMPID to '1' to denote fp-dirty fix Ben Dooks 2025-06-13 17:47:06 +01:00