Commit graph

  • 1b7cf17f8c README: Added some more information on the pipeline Florian Zaruba 2017-03-30 20:41:18 +02:00
  • 5306c7c6a7 README: added contribution manifest and structure Florian Zaruba 2017-03-30 15:14:05 +02:00
  • 1e1b0cceaf UVM: Fixed issues with monitor Florian Zaruba 2017-03-19 13:33:29 +01:00
  • 53c6f0a8ef UVM: Added fu_if monitor Florian Zaruba 2017-03-19 12:57:33 +01:00
  • 0099c7ae50 Basic fibonacci test running, no monitor Florian Zaruba 2017-03-19 12:23:53 +01:00
  • 5d83929e85 UVM: Basic sequence and driver running Florian Zaruba 2017-03-19 02:45:25 +01:00
  • c03c732ece Added fibonacci sequence and driver Florian Zaruba 2017-03-19 01:51:19 +01:00
  • 236572baab Basic TB structure implemented, functionality missing Florian Zaruba 2017-03-19 01:05:35 +01:00
  • e9df593b07 Adapted Makefile to preliminary TB structure Florian Zaruba 2017-03-19 00:29:33 +01:00
  • 5daaa9ec0c UVM Alu: Mock implementation for Alu TB Florian Zaruba 2017-03-19 00:24:56 +01:00
  • 51b55d1b06 Added UVM test-bench structure for basic ALU Florian Zaruba 2017-03-18 23:59:07 +01:00
  • d33b3cffd7 Alu: Cleanup and first 64-bit version Florian Zaruba 2017-03-18 23:28:19 +01:00
  • f382ac65fe Linting alu, fixed some size mismatch issues Florian Zaruba 2017-03-18 21:45:10 +01:00
  • 4740f8ad51 Adde Makefile, linting ALU with new package Florian Zaruba 2017-03-18 21:31:25 +01:00
  • f38f31b1f3 Added ALU operations, alu ops now enums Florian Zaruba 2017-03-18 21:02:00 +01:00
  • 17fcb98817 Made debug interface 64 bit wide, at least write and read data Florian Zaruba 2017-03-18 20:23:01 +01:00
  • 2894aff947 Added initial top-level module with mem and debug if Florian Zaruba 2017-03-18 20:21:58 +01:00
  • 3a607748c0 Made register file 64 bit by default Florian Zaruba 2017-03-18 19:57:02 +01:00
  • bd3556ff99 Added simple register file and README Florian Zaruba 2017-03-18 19:55:23 +01:00