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cva6/core/cvxif_example
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Florian Zaruba 38e8c059b2
Parameterization and other fixes for downstream project (#1950) 
* Bender fixes and switch to `cva6_fifo_v3`
* cfg: Fix verilator warnings
* Bender: Fix yml
* acc_dispatcher: Add `csr_addr_i`
* parameterization: Fox AXI_USER_EN warning
* wb_cache: Fix Verilator Lint warnings
* cva6_fifo_v3: Add to Flist
* parameterization: Address review concerns
* Switch to `cva6_fifo_v3`
* tracer: Remove tracer interface

The interface made a bunch of problems with the
typedefs so I've removed it.

---------

Co-authored-by: JeanRochCoulon <jean-roch.coulon@thalesgroup.com>
Co-authored-by: github-actions[bot] <41898282+github-actions[bot]@users.noreply.github.com>
2024-04-05 13:02:18 +02:00
..
include verible-verilog-format: apply it on core directory (#1540) 2023-10-18 16:36:00 +02:00
cvxif_example_coprocessor.sv Parameterization and other fixes for downstream project (#1950) 2024-04-05 13:02:18 +02:00
instr_decoder.sv verible-verilog-format: apply it on core directory (#1540) 2023-10-18 16:36:00 +02:00