cva6/core/pmp
Matteo Perotti 1bc415391a
[RVV] CVA6 re-parametrization and MMU interface (#2652)
Follow-up to the discussion on extending Linux support to the Ara vector processor.

* Main changes:
Add:
Add external MMU interface to share the MMU with the external accelerator.
Add avoid_neg() function used to clip negative numbers to zero. Useful for parametric array sizes and vector multipliers.

Modifications:
2 commit ports by default in cv64a6_imafdcv_config_pkg.
Change exception_t from localparam to param in cva6.sv.
Add parameters accelerator_req_t, accelerator_resp_t, acc_mmu_req_t, and acc_mmu_resp_t to cva6.sv.
Replace the fall-through register with a spill register in acc_dispatcher to decouple timing with the accelerator.
Decrease cache sizes in cv64a6_imafdcv_sv39_config_pkg.
Modify Bender.yml package name from ariane to cva6.
Add harmless code to prevent synthesizer tool from crashing when compiling csr_regfile.

* Collateral changes:
Fixes:
Guard some X-IF code lines with correct parameter in cva6.sv.
Parametrize the tracer interface with NrCommitPorts.
Add missing local dependencies to Bender.yml.

---------

Co-authored-by: JeanRochCoulon <jean-roch.coulon@thalesgroup.com>
2025-02-11 07:22:31 +01:00
..
include verible-verilog-format: apply it on core directory (#1540) 2023-10-18 16:36:00 +02:00
src [RVV] CVA6 re-parametrization and MMU interface (#2652) 2025-02-11 07:22:31 +01:00
tb verible-verilog-format: apply it on core directory (#1540) 2023-10-18 16:36:00 +02:00
.gitignore Re-organize CVA6 and APU (#725) 2021-09-24 17:21:19 +02:00
Bender.yml Re-organize CVA6 and APU (#725) 2021-09-24 17:21:19 +02:00
formal.sby Remove FORMAL directive from pmp module, as Verilator 5.0 supports assert (#1188) 2023-04-17 15:46:48 +02:00
Makefile Re-organize CVA6 and APU (#725) 2021-09-24 17:21:19 +02:00
README.md Re-organize CVA6 and APU (#725) 2021-09-24 17:21:19 +02:00

PMP

This repository houses a purely combinatorial and parametrizable physical memory protection (PMP) unit.

Warning: The PMP unit does only check the exact byte that is addressed. If the processor wants to load a 8 byte value, then every single byte should get checked. Due to the default granularity of PMPs of 4 bytes, this only comes into play for 8byte RISC-V memory accesses. An easy fix is to increase the granularity to 8 bytes. You can do this by setting the lowest bit of conf_addr_i to 1 if the pmp is in NAPOT mode, or to 0 if the PMP is in TOR mode.