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cache_subsystem
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Fix widths in WT data cache (#735)
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2021-10-01 14:41:14 +02:00 |
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example_tb
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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fpu@79f75e0a0f
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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frontend
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Fix branch prediction for compressed instruction with unaligned addresses (#756)
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2021-10-10 11:09:45 +02:00 |
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include
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Fix widths in WT data cache (#735)
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2021-10-01 14:41:14 +02:00 |
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mmu_sv32
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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mmu_sv39
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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pmp
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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alu.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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amo_buffer.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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ariane.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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ariane_regfile.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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ariane_regfile_ff.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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axi_adapter.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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axi_shim.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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branch_unit.sv
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Fix update of the BHT on correct not taken prediction (#754)
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2021-10-10 11:06:23 +02:00 |
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commit_stage.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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compressed_decoder.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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controller.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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csr_buffer.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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csr_regfile.sv
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Fix PMPCFG csr read for 32bit configuration (#734)
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2021-10-06 09:30:48 +02:00 |
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decoder.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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dromajo_ram.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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ex_stage.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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Flist.cv32a6_imac_sv0
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Flist.*: use lfsr.sv instead of lfsr_8bit.sv (#763)
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2021-10-22 10:07:58 +02:00 |
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Flist.cv64a6_imafdc_sv39
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Flist.*: use lfsr.sv instead of lfsr_8bit.sv (#763)
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2021-10-22 10:07:58 +02:00 |
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fpu_wrap.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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id_stage.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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instr_realign.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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issue_read_operands.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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issue_stage.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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load_store_unit.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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load_unit.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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mult.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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multiplier.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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perf_counters.sv
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Fix per counters for second commit port (#751)
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2021-10-09 10:19:29 +02:00 |
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re_name.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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scoreboard.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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serdiv.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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store_buffer.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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store_unit.sv
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Re-organize CVA6 and APU (#725)
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2021-09-24 17:21:19 +02:00 |
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