cva6/tb
Nils Wistoff 6865f71d56
Fix modelsim flow (#619)
fixes issues with the modelsim flow introduced by recent commits.
* riscv_pkg, csr_regfile: explicit typecast of satp.mode to vm_mode_t
* ariane_testharness: axi_adapter.type_i is of type ariane_axi::ad_req_t

Signed-off-by: Nils Wistoff <nwistoff@iis.ee.ethz.ch>
2021-02-19 18:31:53 +01:00
..
common add tb_wb_dcache 2020-09-11 18:03:49 +02:00
common_verification@a1e569119c tb_wb_dcache: add dependencies 2020-09-11 18:03:49 +02:00
dpi verification: Add co-simulation with dromajo (#445) 2020-06-16 10:30:58 +02:00
dromajo@8acade8725 verification: Add co-simulation with dromajo (#445) 2020-06-16 10:30:58 +02:00
riscv-isa-sim Improve Tandem Simulation, switch-able caches and fix a cache-bug (#192) 2019-03-18 11:51:58 +01:00
tb_cva6_icache tb: rename tb_wt_icache to tb_cva6_icache 2020-10-07 10:00:33 +02:00
tb_serdiv Refactor serpent AXI adapter, bump dbg and atomics submodules, add separate bootrom for linux on OpenPiton (#190) 2019-03-18 11:51:58 +01:00
tb_wb_dcache Remove CVA6 dependency on ariane_soc_pkg (#598) 2021-02-16 12:07:20 +01:00
tb_wt_dcache tb_wt_dcache: supress warn due to AXI dependency 2020-09-11 18:03:49 +02:00
wave Fix Questa flow 2018-09-12 17:36:15 +02:00
ariane_axi_soc_pkg.sv Remove CVA6 dependency on ariane_soc_pkg (#598) 2021-02-16 12:07:20 +01:00
ariane_peripherals.sv peripherals: Assign default to unused interrupts (#618) 2021-02-19 14:59:28 +01:00
ariane_soc_pkg.sv pmp: Add PMP CSRs 2020-07-14 16:08:38 +02:00
ariane_tb.cpp verilator: Dot reference compilation issue (fix #583) (#585) 2021-01-18 14:08:06 +01:00
ariane_tb.sv ariane_tb: Adjust path in testbench 2021-01-29 10:34:13 +01:00
ariane_testharness.sv Fix modelsim flow (#619) 2021-02-19 18:31:53 +01:00