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150 lines
No EOL
6.9 KiB
Makefile
150 lines
No EOL
6.9 KiB
Makefile
# Author: Florian Zaruba, ETH Zurich
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# Date: 03/19/2017
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# Description: Makefile for linting and testing Ariane.
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# compile everything in the following library
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library = work
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# Top level module to compile
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top_level = core_tb
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test_top_level = core_tb
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# Ariane PKG
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ariane_pkg = include/ariane_pkg.svh
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# utility modules
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util = $(wildcard src/util/*.sv*)
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# test targets
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tests = alu scoreboard fifo dcache_arbiter store_queue lsu core fetch_fifo
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# UVM agents
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agents = $(wildcard tb/agents/*/*.sv*)
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# path to interfaces
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interfaces = $(wildcard include/*.svh)
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# UVM environments
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envs = $(wildcard tb/env/*/*.sv*)
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# UVM Sequences
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sequences = $(wildcard tb/sequences/*/*.sv*)
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# Test packages
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test_pkg = $(wildcard tb/test/*/*sequence_pkg.sv*) $(wildcard tb/test/*/*_pkg.sv*)
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# DPI
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dpi = $(wildcard tb/dpi/*)
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# this list contains the standalone components
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src = $(wildcard src/*.sv) $(wildcard tb/common/*.sv)
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# look for testbenches
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tbs = $(wildcard tb/*_tb.sv)
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# RISCV-tests path
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riscv-test-dir = riscv-tests/isa
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riscv-tests = rv64ui-p-add rv64ui-p-addi rv64ui-p-slli rv64ui-p-addiw rv64ui-p-addw rv64ui-p-and rv64ui-p-auipc \
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rv64ui-p-beq rv64ui-p-bge rv64ui-p-bgeu rv64ui-p-andi rv64ui-p-blt rv64ui-p-bltu rv64ui-p-bne \
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rv64ui-p-simple rv64ui-p-jal rv64ui-p-jalr rv64ui-p-or rv64ui-p-ori rv64ui-p-sub rv64ui-p-subw \
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rv64ui-p-xor rv64ui-p-xori rv64ui-p-slliw rv64ui-p-sll rv64ui-p-slli rv64ui-p-sllw \
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rv64ui-p-slt rv64ui-p-slti rv64ui-p-sltiu rv64ui-p-sltu rv64ui-p-sra rv64ui-p-srai \
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rv64ui-p-sraiw rv64ui-p-sraw rv64ui-p-srl rv64ui-p-srli rv64ui-p-srliw rv64ui-p-srlw \
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rv64ui-p-lb rv64ui-p-lbu rv64ui-p-ld rv64ui-p-lh rv64ui-p-lhu rv64ui-p-lui \
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rv64ui-p-lw rv64ui-p-lwu \
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rv64mi-p-csr rv64mi-p-mcsr rv64mi-p-illegal \
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rv64mi-p-ma_addr rv64mi-p-ma_fetch rv64mi-p-sbreak rv64mi-p-scall \
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rv64si-p-csr rv64si-p-ma_fetch rv64si-p-scall rv64si-p-wfi rv64si-p-sbreak \
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rv64si-p-dirty rv64uc-p-rvc \
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rv64ui-v-add rv64ui-v-addi rv64ui-p-slli rv64ui-v-addiw rv64ui-v-addw rv64ui-v-and rv64ui-v-auipc \
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rv64ui-v-beq rv64ui-v-bge rv64ui-v-bgeu rv64ui-v-andi rv64ui-v-blt rv64ui-v-bltu rv64ui-v-bne \
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rv64ui-v-simple rv64ui-v-jal rv64ui-v-jalr rv64ui-v-or rv64ui-v-ori rv64ui-v-sub rv64ui-v-subw \
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rv64ui-v-xor rv64ui-v-xori rv64ui-v-slliw rv64ui-v-sll rv64ui-v-slli rv64ui-v-sllw \
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rv64ui-v-slt rv64ui-v-slti rv64ui-v-sltiu rv64ui-v-sltu rv64ui-v-sra rv64ui-v-srai \
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rv64ui-v-sraiw rv64ui-v-sraw rv64ui-v-srl rv64ui-v-srli rv64ui-v-srliw rv64ui-v-srlw \
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rv64ui-v-lb rv64ui-v-lbu rv64ui-v-ld rv64ui-v-lh rv64ui-v-lhu rv64ui-v-lui
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riscv-test = rv64ui-p-add
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# Search here for include files (e.g.: non-standalone components)
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incdir = ./includes
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# Maximum amount of cycles for a successful simulation run
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max_cycles = 10000000
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# Test case to run
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test_case = core_test
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# QuestaSim Version
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questa_version = -10.6
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compile_flag = +cover=bcfst+/dut -incr -64 -nologo -quiet -suppress 13262 -permissive
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# Moore binary
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moore = ~fschuiki/bin/moore
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# Iterate over all include directories and write them with +incdir+ prefixed
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# +incdir+ works for Verilator and QuestaSim
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list_incdir = $(foreach dir, ${incdir}, +incdir+$(dir))
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# create library if it doesn't exist
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# # Build the TB and module using QuestaSim
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build: $(library) $(library)/.build-agents $(library)/.build-interfaces $(library)/.build-components \
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$(library)/.build-srcs $(library)/.build-tb
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# Optimize top level
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vopt$(questa_version) $(compile_flag) -work $(library) $(test_top_level) -o $(test_top_level)_optimized +acc -check_synthesis
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# src files
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$(library)/.build-srcs: $(util) $(src)
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vlog$(questa_version) $(compile_flag) -work $(library) $(filter %.sv,$(util)) $(list_incdir) -suppress 2583
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# Suppress message that always_latch may not be checked thoroughly by QuestaSim.
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# Compile agents, interfaces and environments
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vlog$(questa_version) $(compile_flag) -work $(library) -pedanticerrors $(src) $(list_incdir) -suppress 2583
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touch $(library)/.build-srcs
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# build TBs
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$(library)/.build-tb: $(dpi) $(tbs)
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# Compile top level with DPI headers
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vlog$(questa_version) -sv $(tbs) -work $(library) $(filter %.c %.cc, $(dpi)) -ccflags "-g -std=c++11 " -dpiheader tb/dpi/elfdpi.h
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touch $(library)/.build-tb
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# Compile Sequences and Tests
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$(library)/.build-components: $(envs) $(sequences) $(test_pkg)
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vlog$(questa_version) $(compile_flag) -work $(library) $(filter %.sv,$(envs)) $(filter %.sv,$(sequences)) \
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$(filter %.sv,$(test_pkg)) ${list_incdir} -suppress 2583
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touch $(library)/.build-components
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# Compile Agents
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$(library)/.build-agents: $(agents) $(ariane_pkg)
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vlog$(questa_version) $(compile_flag) -work $(library) $(ariane_pkg) $(filter %.sv,$(agents)) $(list_incdir) -suppress 2583
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touch $(library)/.build-agents
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# Compile Interfaces
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$(library)/.build-interfaces: $(interfaces)
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vlog$(questa_version) $(compile_flag) -work $(library) $(interfaces) $(list_incdir) -suppress 2583
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touch $(library)/.build-interfaces
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$(library):
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# Create the library
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vlib${questa_version} ${library}
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sim: build
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vsim${questa_version} -lib ${library} ${top_level}_optimized +UVM_TESTNAME=${test_case} +BASEDIR=$(riscv-test-dir) +ASMTEST=$(riscv-test) -coverage -classdebug -do "do tb/wave/wave_core.do"
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simc: build
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vsim${questa_version} -c -lib ${library} ${top_level}_optimized +max-cycles=$(max_cycles) +UVM_TESTNAME=${test_case} +BASEDIR=$(riscv-test-dir) +ASMTEST=$(riscv-test) -coverage -classdebug -do "do tb/wave/wave_core.do"
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run-asm-tests: build
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$(foreach test, $(riscv-tests), vsim$(questa_version) +BASEDIR=$(riscv-test-dir) +max-cycles=$(max_cycles) +UVM_TESTNAME=$(test_case) +ASMTEST=$(test) +uvm_set_action="*,_ALL_,UVM_ERROR,UVM_DISPLAY|UVM_STOP" -c -coverage -classdebug -do "coverage save -onexit $@.ucdb; run -a; quit -code [coverage attribute -name TESTSTATUS -concise]" $(library).$(test_top_level)_optimized;)
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# Run the specified test case
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$(tests): build
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# Optimize top level
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vopt${questa_version} -work ${library} ${compile_flag} $@_tb -o $@_tb_optimized +acc -check_synthesis
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# vsim${questa_version} $@_tb_optimized
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# vsim${questa_version} +UVM_TESTNAME=$@_test -coverage -classdebug $@_tb_optimized
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vsim${questa_version} +UVM_TESTNAME=$@_test +ASMTEST=$(riscv-test-dir)/$(riscv-test) +uvm_set_action="*,_ALL_,UVM_ERROR,UVM_DISPLAY|UVM_STOP" -c -coverage -classdebug -do "coverage save -onexit $@.ucdb; run -a; quit -code [coverage attribute -name TESTSTATUS -concise]" ${library}.$@_tb_optimized
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build-moore:
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[ ! -e .moore ] || rm .moore
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$(foreach src_file, $(src), $(moore) compile $(src_file);)
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# build the RISC-V tests
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build-tests:
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cd riscv-tests && autoconf && ./configure --prefix=/home/zarubaf/riscv && make -j8
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# User Verilator to lint the target
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lint:
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verilator $(ariane_pkg) $(src) --lint-only \
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$(list_incdir) --top-module ariane
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clean:
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rm -rf work/ *.ucdb
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.PHONY:
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build lint build-moore
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# make CC=/usr/pack/modelsim-10.6-kgf/questasim/gcc-5.3.0-linux_x86_64/bin/gcc CXX=/usr/pack/modelsim-10.6-kgf/questasim/gcc-5.3.0-linux_x86_64/bin/g++ -j20
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