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[examples/fpga] Fix memory interface

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Logic driving instr_gnt/data_gnt violated Ibex memory protocol. It just
happened to work until a recent change.

Fixes #1500
This commit is contained in:
Greg Chadwick 2022-01-13 18:17:30 +00:00 • committed by Greg Chadwick
parent 2ec8d7433e
commit e53b033962
1 changed files with 2 additions and 11 deletions
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13
examples/fpga/artya7/rtl/top_artya7.sv
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@ -111,17 +111,8 @@ module top_artya7 (
.b_rdata_o (instr_rdata)
);
// SRAM to Ibex
always_ff @(posedge clk_sys or negedge rst_sys_n) begin
if (!rst_sys_n) begin
instr_gnt <= '0;
data_gnt <= '0;
end else begin
instr_gnt <= instr_req ;
data_gnt <= data_req ;
end
end
assign instr_gnt = instr_req;
assign data_gnt = data_req;
// Connect the LED output to the lower four bits of the most significant
// byte