cve2/formal
Tobias Wölfel 1553636a7d [formal] Add check for multdiv cycle consumption
Check that the number of cycles are always as specified for the current
configuration for data independent operations.

The required input signals for each arithmetic operation are split into
different files which are included into the testbench.
For each combination of operation and configured configuration
(slow/fast/single) a define stores the number of cycles in a separate
file. A target exists for each combination.
For a convenient execution the targets are grouped together in a
makefile.

The implementation is based on the formal/icache checks.

For the selection of the single cycle multiplication with the fast
multiplication the parameter is set directly to the enum integer value.
2020-09-16 16:30:20 +01:00
..
data_ind_timing [formal] Add check for multdiv cycle consumption 2020-09-16 16:30:20 +01:00
icache Move sv2v script into standalone core file 2020-09-16 16:30:20 +01:00
riscv-formal Move riscv-formal code into formal/riscv-formal 2020-07-02 15:19:11 +01:00
.gitignore [formal] Create Ibex Verilog source 2020-05-25 16:47:25 +01:00