Rupert Swarbrick 8c11bd780c Update lowrisc_ip to lowRISC/opentitan@c91b50f3 ... This is manually squashed with a change to import dv_base_reg too, a new module that was created by Weicai's "csr backdoor support" patch. It's needed because it is a dependency of dv_lib. Update code from upstream repository https://github.com/lowRISC/opentitan to revision c91b50f357a76dae2ada104e397f6a91f72a33da * [prim_ram*_adv] Update core files and add prim_util dependency (Michael Schaffner) * [prim_ram*_adv] Implement Byte parity in prim_ram*_adv (Michael Schaffner) * [dvsim] Run tests in "interleaved" order (Rupert Swarbrick) * [dvsim] Remove unnecessary getattr/setattr calls from SimCfg.py (Rupert Swarbrick) * [dv] Add support for multiple ral models (Srikrishna Iyer) * [rtl] Fix prim flash dependency (Srikrishna Iyer) * [prim_fifo_sync] Make FIFO output zero when empty (Noah Moroze) * [dv] csr backdoor support (Weicai Yang) * [prim] Add a "clog2 width" function (Philipp Wagner) * [dvsim] Allow max-parallel to be set in the environment (Rupert Swarbrick) * [dvsim] Fix --reseed argument (Rupert Swarbrick) * [prim_ram/rom*_adv] Break out into individual core files (Michael Schaffner) * [prim_rom] Align port naming with prim_ram* (Michael Schaffner) * [dv] Allow a test to have "simple" timestamps (Rupert Swarbrick) * [dvsim] Improve --help message (Rupert Swarbrick) * [dvsim] Remove unused --local argument (Rupert Swarbrick) * [dvsim] Small tidy-ups to mode selection in SimCfg.py (Rupert Swarbrick) * [fpv] formal compile fix required by VC Formal (Cindy Chen) * [dvsim] Fix error detection logic in Deploy.py (Rupert Swarbrick) Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>		2020-06-12 16:15:11 +01:00
..
eembc_coremark	Update eembc_coremark to eembc/coremark@0c91314	2020-03-09 14:41:40 +00:00
google_riscv-dv	Update google_riscv-dv to google/riscv-dv@1ad73cc	2020-06-01 08:48:10 -07:00
lowrisc_ip	Update lowrisc_ip to lowRISC/opentitan@c91b50f3	2020-06-12 16:15:11 +01:00
patches/eembc_coremark	[sw] Add Coremark makefile and support files	2020-03-09 14:41:40 +00:00
eembc_coremark.lock.hjson	Update eembc_coremark to eembc/coremark@0c91314	2020-03-09 14:41:40 +00:00
google_riscv-dv.lock.hjson	Update google_riscv-dv to google/riscv-dv@1ad73cc	2020-06-01 08:48:10 -07:00
google_riscv-dv.vendor.hjson	exclude tar.gz compressed file from vendoring, and remove from vendor directory (#550)	2020-01-09 15:50:34 -08:00
lowrisc_ip.lock.hjson	Update lowrisc_ip to lowRISC/opentitan@c91b50f3	2020-06-12 16:15:11 +01:00
lowrisc_ip.vendor.hjson	Update lowrisc_ip to lowRISC/opentitan@c91b50f3	2020-06-12 16:15:11 +01:00