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932db14619
* rename files and modules to cve2 Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com> * updated tb files Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com> * remaining references to ibex: gitignore, examples, etc. Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com> Signed-off-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com> Co-authored-by: Szymon Bieganski <szymon.bieganski@oss.nxp.com>
19 lines
488 B
Text
19 lines
488 B
Text
CAPI=2:
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# Copyright lowRISC contributors.
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# Licensed under the Apache License, Version 2.0, see LICENSE for details.
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# SPDX-License-Identifier: Apache-2.0
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name: "lowrisc:cve2:fpga_xilinx_shared"
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description: "Collection of useful RTL for Xilinx based examples"
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filesets:
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files_sv:
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depend:
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- lowrisc:prim:ram_2p
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files:
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- rtl/fpga/xilinx/clkgen_xil7series.sv
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- rtl/ram_2p.sv
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file_type: systemVerilogSource
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targets:
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default:
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filesets:
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- files_sv
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