cve2/rtl
Tom Roberts 97a50d7f12 [rtl] Add fixed time execution of branches
- A new parameter and a run-time control bit (DataIndTiming and
  data_ind_timing) enabling different behaviour for running security critical
  code sections.
- In the new mode, all branches act as if taken, with not-taken
  branches executing as a branch to the next instruction.
- This should give similar execution time/power characteristics
  regardless of the branch condition.
- Note that with the BranchTargetALU, branches stall an extra cycle in
  secure mode to avoid factoring the branch-taken decision into the
  branch target address mux.

Signed-off-by: Tom Roberts <tomroberts@lowrisc.org>
2020-04-13 14:27:40 +01:00
..
ibex_alu.sv [bitmanip] Add ZBB Instruction Group 2020-03-27 17:13:26 +01:00
ibex_compressed_decoder.sv [rtl] Introduce default clk/reset to prim_assert 2020-02-10 09:42:52 +00:00
ibex_controller.sv [rtl] Branch signal timing fix 2020-03-25 15:26:02 +00:00
ibex_core.f Merge pull request #624 from ganoam/fpga-opt-perf-mon-pr 2020-03-06 12:49:51 +01:00
ibex_core.sv [rtl] Add fixed time execution of branches 2020-04-13 14:27:40 +01:00
ibex_core_tracing.sv [rtl] Add fixed time execution of branches 2020-04-13 14:27:40 +01:00
ibex_counters.sv Use a syntax compatible with Verible 2020-03-13 10:34:12 +00:00
ibex_cs_registers.sv [rtl] Add fixed time execution of branches 2020-04-13 14:27:40 +01:00
ibex_decoder.sv [rtl] Add fixed time execution of branches 2020-04-13 14:27:40 +01:00
ibex_ex_block.sv [bitmanip] Add ZBB Instruction Group 2020-03-27 17:13:26 +01:00
ibex_fetch_fifo.sv [rtl] Fix mtval for unaligned instr errors 2020-03-18 12:53:35 +00:00
ibex_icache.sv [rtl/icache] Fix an inconsistency in data output 2020-03-24 13:47:57 +00:00
ibex_id_stage.sv [rtl] Add fixed time execution of branches 2020-04-13 14:27:40 +01:00
ibex_if_stage.sv [rtl] Extend BT ALU to be used for all jumps 2020-03-25 15:25:22 +00:00
ibex_load_store_unit.sv [RTL] Add configurable third pipeline stage 2020-03-06 15:29:14 +00:00
ibex_multdiv_fast.sv [rtl] Fixes for single-cycle mutiply 2020-03-11 11:53:54 +00:00
ibex_multdiv_slow.sv [RTL] Add configurable third pipeline stage 2020-03-06 15:29:14 +00:00
ibex_pkg.sv [bitmanip] Add ZBB Instruction Group 2020-03-27 17:13:26 +01:00
ibex_pmp.sv [rtl/pmp] Fix PMP error prioritization 2020-03-27 16:43:35 +00:00
ibex_prefetch_buffer.sv [rtl] Fix mtval for unaligned instr errors 2020-03-18 12:53:35 +00:00
ibex_register_file_ff.sv Mention CREDITS.md in license header 2019-08-27 18:10:02 +01:00
ibex_register_file_fpga.sv [rtl] Fix Typo in FPGA Register File 2020-01-20 17:01:30 +00:00
ibex_register_file_latch.sv Register file: update comments 2019-08-29 15:24:18 +01:00
ibex_tracer.sv [bitmanip] Add ZBB Instruction Group 2020-03-27 17:13:26 +01:00
ibex_tracer_pkg.sv [bitmanip] Add ZBB Instruction Group 2020-03-27 17:13:26 +01:00
ibex_wb_stage.sv [RTL] Add configurable third pipeline stage 2020-03-06 15:29:14 +00:00