cve2/examples
Greg Chadwick 163cd8142a [simple-system] always_comb should be always
Previous lint fix was incorrect. The 'always_comb' block here should be
an 'always'. It is not combinational logic but rather an infinite loop
to generate a clock when running in a simulator that isn't verilator
(e.g.  under simple-system under VCS) so the use of 'always' is
appropriate.

Signed-off-by: Greg Chadwick <gac@lowrisc.org>
2020-11-02 17:04:49 +00:00
..
fpga/artya7 [doc] Fix broken link to examples description 2020-10-02 15:03:19 +01:00
simple_system [simple-system] always_comb should be always 2020-11-02 17:04:49 +00:00
sw [simple-system] Add missing linker sections 2020-09-23 14:28:31 +01:00