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Corrected RV32gc imperas configuration

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David Harris 2024-10-16 13:26:20 -07:00
parent 69898f65da
commit 01805d9fb1
1 changed files with 0 additions and 5 deletions
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5
config/rv32gc/imperas.ic
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@ -63,9 +63,6 @@
--override cpu/scontext_undefined=T
--override cpu/mcontext_undefined=T
# nonratified mnosie register not implemented
--override cpu/mnoise_undefined=T
# mcause and scause only have 4 lsbs of code and 1 msb of interrupt flag
#--override cpu/ecode_mask=0x8000000F # for RV32
--override cpu/ecode_mask=0x800000000000000F # for RV64
@ -73,8 +70,6 @@
# Debug mode not yet supported
--override cpu/debug_mode=none
# Zkr entropy source and seed register not supported.
--override cpu/Zkr=F
--override cpu/reset_address=0x80000000