github-mirrors/cvw
1
0
Fork 0
mirror of https://github.com/openhwgroup/cvw.git synced 2025-04-23 13:27:16 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

Removed assign statement inside always block

Browse source
This commit is contained in:
David Harris 2023-11-13 07:23:15 -08:00
parent 0f4f89edfe
commit 121f685fa2
1 changed files with 1 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

2
src/fpu/fdivsqrt/fdivsqrtcycles.sv
View file

@ -76,7 +76,7 @@ module fdivsqrtcycles import cvw::*; #(parameter cvw_t P) (
if (P.IDIV_ON_FPU) ResultBitsE = IntDivE ? IntResultBitsE : FPResultBitsE;
else ResultBitsE = FPResultBitsE;
assign CyclesE = (ResultBitsE-1)/(P.RK) + 1; // ceil (ResultBitsE/rk)
CyclesE = (ResultBitsE-1)/(P.RK) + 1; // ceil (ResultBitsE/rk)
end
/* verilator lint_on WIDTH */