github-mirrors/cvw
1
0
Fork 0
mirror of https://github.com/openhwgroup/cvw.git synced 2025-04-23 05:17:20 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

Commented out riscv,isa-extensions from Arty device tree until Linux kernel is updated.

Browse source
This commit is contained in:
Jacob Pease 2024-07-11 10:53:18 -05:00
parent 15b23ceb4d
commit 1a2607c3d9
1 changed files with 1 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

2
linux/devicetree/wally-artya7.dts
View file

@ -31,7 +31,7 @@
status = "okay";
compatible = "riscv";
riscv,isa = "rv64imafdcsu";
riscv,isa-extensions = "imafdc", "sstc", "svinval", "svnapot", "svpbmt", "zba", "zbb", "zbc", "zbs", "zicbom", "zicbop", "zicbopz", "zicntr", "zicsr", "zifencei", "zihpm";
// riscv,isa-extensions = "imafdc", "sstc", "svinval", "svnapot", "svpbmt", "zba", "zbb", "zbc", "zbs", "zicbom", "zicbop", "zicbopz", "zicntr", "zicsr", "zifencei", "zihpm";
mmu-type = "riscv,sv48";
interrupt-controller {