mirror of
https://github.com/openhwgroup/cvw.git
synced 2025-04-23 05:17:20 -04:00
Added test to check for AMO access fault.
This commit is contained in:
Rose Thompson
parent
35693eb7cc
commit
1e2a9e3b18
2 changed files with 192 additions and 142 deletions
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@ -15,21 +15,21 @@ add wave -noupdate -group HDU -expand -group hazards /testbench/dut/core/hzu/LSU
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add wave -noupdate -group HDU -expand -group hazards /testbench/dut/core/ieu/c/MDUStallD
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add wave -noupdate -group HDU -expand -group hazards /testbench/dut/core/hzu/DivBusyE
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add wave -noupdate -group HDU -expand -group hazards /testbench/dut/core/hzu/FDivBusyE
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/core/priv/priv/trap/InstrMisalignedFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/core/priv/priv/trap/InstrAccessFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/core/priv/priv/trap/IllegalInstrFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/core/priv/priv/trap/BreakpointFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/core/priv/priv/trap/LoadMisalignedFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/core/priv/priv/trap/StoreAmoMisalignedFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/core/priv/priv/trap/LoadAccessFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/core/priv/priv/trap/StoreAmoAccessFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/core/priv/priv/trap/EcallFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/core/priv/priv/trap/InstrPageFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/core/priv/priv/trap/LoadPageFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/core/priv/priv/trap/StoreAmoPageFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/core/priv/priv/trap/InterruptM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/core/priv/priv/trap/HPTWInstrAccessFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/core/priv/priv/pmd/WFITimeoutM
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add wave -noupdate -group HDU -group traps /testbench/dut/core/priv/priv/trap/InstrMisalignedFaultM
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add wave -noupdate -group HDU -group traps /testbench/dut/core/priv/priv/trap/InstrAccessFaultM
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add wave -noupdate -group HDU -group traps /testbench/dut/core/priv/priv/trap/IllegalInstrFaultM
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add wave -noupdate -group HDU -group traps /testbench/dut/core/priv/priv/trap/BreakpointFaultM
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add wave -noupdate -group HDU -group traps /testbench/dut/core/priv/priv/trap/LoadMisalignedFaultM
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add wave -noupdate -group HDU -group traps /testbench/dut/core/priv/priv/trap/StoreAmoMisalignedFaultM
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add wave -noupdate -group HDU -group traps /testbench/dut/core/priv/priv/trap/LoadAccessFaultM
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add wave -noupdate -group HDU -group traps /testbench/dut/core/priv/priv/trap/StoreAmoAccessFaultM
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add wave -noupdate -group HDU -group traps /testbench/dut/core/priv/priv/trap/EcallFaultM
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add wave -noupdate -group HDU -group traps /testbench/dut/core/priv/priv/trap/InstrPageFaultM
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add wave -noupdate -group HDU -group traps /testbench/dut/core/priv/priv/trap/LoadPageFaultM
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add wave -noupdate -group HDU -group traps /testbench/dut/core/priv/priv/trap/StoreAmoPageFaultM
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add wave -noupdate -group HDU -group traps /testbench/dut/core/priv/priv/trap/InterruptM
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add wave -noupdate -group HDU -group traps /testbench/dut/core/priv/priv/trap/HPTWInstrAccessFaultM
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add wave -noupdate -group HDU -group traps /testbench/dut/core/priv/priv/pmd/WFITimeoutM
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add wave -noupdate -group HDU -group Flush -color Yellow /testbench/dut/core/FlushD
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add wave -noupdate -group HDU -group Flush -color Yellow /testbench/dut/core/FlushE
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add wave -noupdate -group HDU -group Flush -color Yellow /testbench/dut/core/FlushM
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@ -204,12 +204,12 @@ add wave -noupdate -group {Execution Stage} /testbench/dut/core/ieu/dp/SrcAE
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add wave -noupdate -group {Execution Stage} /testbench/dut/core/ieu/dp/SrcBE
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add wave -noupdate -group {Execution Stage} /testbench/dut/core/ieu/dp/ALUResultE
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add wave -noupdate -group {Execution Stage} /testbench/dut/core/ieu/dp/ResultW
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add wave -noupdate -group {Memory Stage} /testbench/FunctionName/FunctionName/FunctionName
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add wave -noupdate -group {Memory Stage} /testbench/dut/core/InstrValidM
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add wave -noupdate -group {Memory Stage} /testbench/dut/core/PCM
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add wave -noupdate -group {Memory Stage} /testbench/dut/core/InstrM
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add wave -noupdate -group {Memory Stage} /testbench/InstrMName
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add wave -noupdate -group {Memory Stage} /testbench/dut/core/lsu/IEUAdrM
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add wave -noupdate -expand -group {Memory Stage} /testbench/FunctionName/FunctionName/FunctionName
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add wave -noupdate -expand -group {Memory Stage} /testbench/dut/core/InstrValidM
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add wave -noupdate -expand -group {Memory Stage} /testbench/dut/core/PCM
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add wave -noupdate -expand -group {Memory Stage} /testbench/dut/core/InstrM
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add wave -noupdate -expand -group {Memory Stage} /testbench/InstrMName
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add wave -noupdate -expand -group {Memory Stage} /testbench/dut/core/lsu/IEUAdrM
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add wave -noupdate -group lsu /testbench/dut/core/lsu/ReadDataM
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add wave -noupdate -group lsu /testbench/dut/core/lsu/WriteDataM
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add wave -noupdate -group lsu /testbench/dut/core/lsu/FWriteDataM
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@ -229,13 +229,8 @@ add wave -noupdate -group lsu -expand -group bus /testbench/dut/core/lsu/LSUHWDA
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add wave -noupdate -group lsu -expand -group bus /testbench/dut/core/lsu/bus/dcache/ahbcacheinterface/CacheBusRW
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add wave -noupdate -group lsu -expand -group bus /testbench/dut/core/lsu/bus/dcache/ahbcacheinterface/CacheBusAck
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add wave -noupdate -group lsu -expand -group bus /testbench/dut/core/lsu/bus/dcache/dcache/CacheBusAdr
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add wave -noupdate -group lsu -group alignment -color Gold /testbench/dut/core/lsu/ziccslm_align/align/CurrState
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add wave -noupdate -group lsu -group alignment /testbench/dut/core/lsu/ziccslm_align/align/MemRWM
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add wave -noupdate -group lsu -group alignment /testbench/dut/core/lsu/ziccslm_align/align/IEUAdrSpillM
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add wave -noupdate -group lsu -group alignment /testbench/dut/core/lsu/ByteMaskM
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add wave -noupdate -group lsu -group alignment /testbench/dut/core/lsu/ByteMaskExtendedM
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add wave -noupdate -group lsu -group alignment /testbench/dut/core/lsu/ziccslm_align/align/SelSpillE
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add wave -noupdate -group lsu -group alignment /testbench/dut/core/lsu/ziccslm_align/align/SelSpillM
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add wave -noupdate -group lsu -group alignment /testbench/dut/core/lsu/ByteMaskSpillM
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add wave -noupdate -group lsu -group alignment /testbench/dut/core/lsu/LSUWriteDataM
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add wave -noupdate -group lsu -group alignment /testbench/dut/core/lsu/LSUWriteDataSpillM
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@ -255,8 +250,8 @@ add wave -noupdate -group lsu -expand -group dcache -group SRAM-update-control /
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add wave -noupdate -group lsu -expand -group dcache -group SRAM-update-control /testbench/dut/core/lsu/bus/dcache/dcache/ClearValid
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add wave -noupdate -group lsu -expand -group dcache -group SRAM-update-control /testbench/dut/core/lsu/bus/dcache/dcache/SetDirty
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add wave -noupdate -group lsu -expand -group dcache -group SRAM-update-control /testbench/dut/core/lsu/bus/dcache/dcache/ClearDirty
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add wave -noupdate -group lsu -expand -group dcache -group {requesting address} /testbench/dut/core/lsu/IEUAdrE
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add wave -noupdate -group lsu -expand -group dcache -group {requesting address} /testbench/dut/core/lsu/bus/dcache/dcache/PAdr
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add wave -noupdate -group lsu -expand -group dcache -expand -group {requesting address} /testbench/dut/core/lsu/IEUAdrE
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add wave -noupdate -group lsu -expand -group dcache -expand -group {requesting address} /testbench/dut/core/lsu/bus/dcache/dcache/PAdr
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add wave -noupdate -group lsu -expand -group dcache -group SRAM-outputs /testbench/dut/core/lsu/bus/dcache/dcache/ReadDataLineWay
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add wave -noupdate -group lsu -expand -group dcache -group SRAM-outputs /testbench/dut/core/lsu/bus/dcache/dcache/ReadDataLineCache
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add wave -noupdate -group lsu -expand -group dcache -group SRAM-outputs /testbench/dut/core/lsu/bus/dcache/dcache/TagWay
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@ -404,28 +399,30 @@ add wave -noupdate -group lsu -group pma /testbench/dut/core/lsu/dmmu/dmmu/PMASt
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add wave -noupdate -group lsu -group pmp /testbench/dut/core/lsu/dmmu/dmmu/PMPInstrAccessFaultF
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add wave -noupdate -group lsu -group pmp /testbench/dut/core/lsu/dmmu/dmmu/PMPLoadAccessFaultM
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add wave -noupdate -group lsu -group pmp /testbench/dut/core/lsu/dmmu/dmmu/PMPStoreAmoAccessFaultM
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add wave -noupdate -group lsu -group ptwalker /testbench/dut/core/lsu/hptw/hptw/SelHPTW
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add wave -noupdate -group lsu -group ptwalker /testbench/dut/core/lsu/hptw/hptw/HPTWStall
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add wave -noupdate -group lsu -group ptwalker /testbench/dut/core/lsu/hptw/hptw/DTLBWalk
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add wave -noupdate -group lsu -group ptwalker -color Gold /testbench/dut/core/lsu/hptw/hptw/WalkerState
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add wave -noupdate -group lsu -group ptwalker /testbench/dut/core/lsu/hptw/hptw/NextWalkerState
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add wave -noupdate -group lsu -group ptwalker /testbench/dut/core/lsu/hptw/hptw/HPTWAdr
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add wave -noupdate -group lsu -group ptwalker /testbench/dut/core/lsu/hptw/hptw/PTE
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add wave -noupdate -group lsu -group ptwalker /testbench/dut/core/lsu/hptw/hptw/NextPageType
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add wave -noupdate -group lsu -group ptwalker /testbench/dut/core/lsu/hptw/hptw/PageType
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add wave -noupdate -group lsu -group ptwalker /testbench/dut/core/lsu/hptw/hptw/ValidNonLeafPTE
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add wave -noupdate -group lsu -group ptwalker -expand -group types /testbench/dut/core/lsu/DTLBMissM
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add wave -noupdate -group lsu -group ptwalker -expand -group types /testbench/dut/core/lsu/hptw/hptw/ITLBWriteF
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add wave -noupdate -group lsu -group ptwalker -expand -group types /testbench/dut/core/lsu/hptw/hptw/DTLBWriteM
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add wave -noupdate -group lsu -group ptwalker -expand -group faults /testbench/dut/core/lsu/hptw/hptw/HPTWFaultM
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add wave -noupdate -group lsu -group ptwalker -expand -group faults /testbench/dut/core/lsu/hptw/hptw/LSUAccessFaultM
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add wave -noupdate -group lsu -group ptwalker -expand -group faults /testbench/dut/core/lsu/hptw/hptw/HPTWInstrAccessFaultF
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add wave -noupdate -group lsu -group ptwalker -expand -group faults /testbench/dut/core/lsu/hptw/hptw/LSULoadAccessFaultM
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add wave -noupdate -group lsu -group ptwalker -expand -group faults /testbench/dut/core/lsu/hptw/hptw/LSUStoreAmoAccessFaultM
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add wave -noupdate -group lsu -group ptwalker -expand -group faults /testbench/dut/core/lsu/hptw/hptw/LoadAccessFaultM
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add wave -noupdate -group lsu -group ptwalker -expand -group faults /testbench/dut/core/lsu/hptw/hptw/StoreAmoAccessFaultM
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add wave -noupdate -group lsu -group ptwalker -expand -group faults /testbench/dut/core/lsu/hptw/hptw/HPTWInstrAccessFault
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add wave -noupdate -group lsu -group ptwalker -expand -group faults /testbench/dut/core/lsu/hptw/hptw/PBMTFaultM
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add wave -noupdate -group lsu -expand -group ptwalker /testbench/dut/core/lsu/hptw/hptw/SelHPTW
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add wave -noupdate -group lsu -expand -group ptwalker /testbench/dut/core/lsu/hptw/hptw/HPTWStall
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add wave -noupdate -group lsu -expand -group ptwalker /testbench/dut/core/lsu/hptw/hptw/DTLBWalk
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add wave -noupdate -group lsu -expand -group ptwalker -color Gold /testbench/dut/core/lsu/hptw/hptw/WalkerState
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add wave -noupdate -group lsu -expand -group ptwalker /testbench/dut/core/lsu/hptw/hptw/NextWalkerState
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add wave -noupdate -group lsu -expand -group ptwalker /testbench/dut/core/lsu/hptw/hptw/HPTWAdr
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add wave -noupdate -group lsu -expand -group ptwalker /testbench/dut/core/lsu/hptw/hptw/PTE
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add wave -noupdate -group lsu -expand -group ptwalker /testbench/dut/core/lsu/hptw/hptw/NextPageType
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add wave -noupdate -group lsu -expand -group ptwalker /testbench/dut/core/lsu/hptw/hptw/PageType
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add wave -noupdate -group lsu -expand -group ptwalker /testbench/dut/core/lsu/hptw/hptw/ValidNonLeafPTE
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add wave -noupdate -group lsu -expand -group ptwalker /testbench/dut/core/lsu/hptw/hptw/TranslationVAdr
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add wave -noupdate -group lsu -expand -group ptwalker -expand -group types /testbench/dut/core/lsu/DTLBMissM
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add wave -noupdate -group lsu -expand -group ptwalker -expand -group types /testbench/dut/core/lsu/hptw/hptw/DTLBWriteM
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add wave -noupdate -group lsu -expand -group ptwalker -expand -group types /testbench/dut/core/lsu/hptw/hptw/ITLBMissOrUpdateAF
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add wave -noupdate -group lsu -expand -group ptwalker -expand -group types /testbench/dut/core/lsu/hptw/hptw/ITLBWriteF
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add wave -noupdate -group lsu -expand -group ptwalker -expand -group faults /testbench/dut/core/lsu/hptw/hptw/HPTWFaultM
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add wave -noupdate -group lsu -expand -group ptwalker -expand -group faults /testbench/dut/core/lsu/hptw/hptw/LSUAccessFaultM
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add wave -noupdate -group lsu -expand -group ptwalker -expand -group faults /testbench/dut/core/lsu/hptw/hptw/HPTWInstrAccessFaultF
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add wave -noupdate -group lsu -expand -group ptwalker -expand -group faults /testbench/dut/core/lsu/hptw/hptw/LSULoadAccessFaultM
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add wave -noupdate -group lsu -expand -group ptwalker -expand -group faults /testbench/dut/core/lsu/hptw/hptw/LSUStoreAmoAccessFaultM
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add wave -noupdate -group lsu -expand -group ptwalker -expand -group faults /testbench/dut/core/lsu/hptw/hptw/LoadAccessFaultM
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add wave -noupdate -group lsu -expand -group ptwalker -expand -group faults /testbench/dut/core/lsu/hptw/hptw/StoreAmoAccessFaultM
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add wave -noupdate -group lsu -expand -group ptwalker -expand -group faults /testbench/dut/core/lsu/hptw/hptw/HPTWInstrAccessFault
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add wave -noupdate -group lsu -expand -group ptwalker -expand -group faults /testbench/dut/core/lsu/hptw/hptw/PBMTFaultM
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add wave -noupdate -group {WriteBack stage} /testbench/InstrW
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add wave -noupdate -group {WriteBack stage} /testbench/InstrWName
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add wave -noupdate -group {WriteBack stage} /testbench/dut/core/priv/priv/pmd/wfiW
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@ -468,88 +465,88 @@ add wave -noupdate -group AHB /testbench/dut/core/ebu/ebu/HBURST
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add wave -noupdate -group AHB /testbench/dut/core/ebu/ebu/HPROT
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add wave -noupdate -group AHB /testbench/dut/core/ebu/ebu/HTRANS
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add wave -noupdate -group AHB /testbench/dut/core/ebu/ebu/HMASTLOCK
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add wave -noupdate -expand -group uncore /testbench/dut/uncoregen/uncore/HADDR
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add wave -noupdate -expand -group uncore /testbench/dut/uncoregen/uncore/HTRANS
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add wave -noupdate -expand -group uncore /testbench/dut/uncoregen/uncore/HREADY
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add wave -noupdate -expand -group uncore /testbench/dut/uncoregen/uncore/HSELRegions
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add wave -noupdate -expand -group uncore /testbench/dut/uncoregen/uncore/HSELNoneD
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add wave -noupdate -expand -group uncore /testbench/dut/uncoregen/uncore/HSELPLICD
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add wave -noupdate -expand -group uncore /testbench/dut/uncoregen/uncore/HRDATA
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add wave -noupdate -expand -group uncore -group plic /testbench/dut/uncoregen/uncore/plic/plic/UARTIntr
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add wave -noupdate -expand -group uncore -group plic /testbench/dut/uncoregen/uncore/plic/plic/GPIOIntr
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add wave -noupdate -expand -group uncore -group plic /testbench/dut/uncoregen/uncore/plic/plic/MExtInt
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add wave -noupdate -expand -group uncore -group plic /testbench/dut/uncoregen/uncore/plic/plic/SExtInt
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add wave -noupdate -expand -group uncore -group plic /testbench/dut/uncoregen/uncore/plic/plic/Dout
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add wave -noupdate -expand -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/intClaim
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add wave -noupdate -expand -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/intEn
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add wave -noupdate -expand -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/intInProgress
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add wave -noupdate -expand -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/intPending
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add wave -noupdate -expand -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/intPriority
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add wave -noupdate -expand -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/intThreshold
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add wave -noupdate -expand -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/nextIntPending
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add wave -noupdate -expand -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/requests
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add wave -noupdate -expand -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/irqMatrix
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add wave -noupdate -expand -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/priorities_with_irqs
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add wave -noupdate -expand -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/max_priority_with_irqs
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add wave -noupdate -expand -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/irqs_at_max_priority
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add wave -noupdate -expand -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/threshMask
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add wave -noupdate -expand -group uncore -group CLINT /testbench/dut/uncoregen/uncore/clint/clint/MTIME
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add wave -noupdate -expand -group uncore -group CLINT /testbench/dut/uncoregen/uncore/clint/clint/MTIMECMP
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add wave -noupdate -expand -group uncore -group CLINT -expand -group {clint bus} /testbench/dut/uncoregen/uncore/clint/clint/PSEL
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add wave -noupdate -expand -group uncore -group CLINT -expand -group {clint bus} /testbench/dut/uncoregen/uncore/clint/clint/PADDR
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add wave -noupdate -expand -group uncore -group CLINT -expand -group {clint bus} /testbench/dut/uncoregen/uncore/clint/clint/PWDATA
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add wave -noupdate -expand -group uncore -group CLINT -expand -group {clint bus} /testbench/dut/uncoregen/uncore/clint/clint/PSTRB
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add wave -noupdate -expand -group uncore -group CLINT -expand -group {clint bus} /testbench/dut/uncoregen/uncore/clint/clint/PWRITE
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add wave -noupdate -expand -group uncore -group CLINT -expand -group {clint bus} /testbench/dut/uncoregen/uncore/clint/clint/PENABLE
|
||||
add wave -noupdate -expand -group uncore -group CLINT -expand -group {clint bus} /testbench/dut/uncoregen/uncore/clint/clint/PRDATA
|
||||
add wave -noupdate -expand -group uncore -group CLINT -expand -group {clint bus} /testbench/dut/uncoregen/uncore/clint/clint/PREADY
|
||||
add wave -noupdate -expand -group uncore -group uart -expand -group Registers /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/LSR
|
||||
add wave -noupdate -expand -group uncore -group uart -expand -group Registers /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/MCR
|
||||
add wave -noupdate -expand -group uncore -group uart -expand -group Registers /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/MSR
|
||||
add wave -noupdate -expand -group uncore -group uart -expand -group Registers /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/RBR
|
||||
add wave -noupdate -expand -group uncore -group uart -expand -group Registers /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/TXHR
|
||||
add wave -noupdate -expand -group uncore -group uart -expand -group Registers /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/LCR
|
||||
add wave -noupdate -expand -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/intrID
|
||||
add wave -noupdate -expand -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/INTR
|
||||
add wave -noupdate -expand -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/rxstate
|
||||
add wave -noupdate -expand -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/txstate
|
||||
add wave -noupdate -expand -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/txbitssent
|
||||
add wave -noupdate -expand -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/txbitsexpected
|
||||
add wave -noupdate -expand -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/rxbitsreceived
|
||||
add wave -noupdate -expand -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/rxbitsexpected
|
||||
add wave -noupdate -expand -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/rxdata
|
||||
add wave -noupdate -expand -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/rxoverrunerr
|
||||
add wave -noupdate -expand -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/rxdataready
|
||||
add wave -noupdate -expand -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/rxdataavailintr
|
||||
add wave -noupdate -expand -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/RXBR
|
||||
add wave -noupdate -expand -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/squashRXerrIP
|
||||
add wave -noupdate -expand -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/rxshiftreg
|
||||
add wave -noupdate -expand -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/SOUTbit
|
||||
add wave -noupdate -expand -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/SINsync
|
||||
add wave -noupdate -expand -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/txsr
|
||||
add wave -noupdate -expand -group uncore -group uart -expand -group {Off-Chip Interface} /testbench/dut/uncoregen/uncore/uartgen/uart/SIN
|
||||
add wave -noupdate -expand -group uncore -group uart -expand -group {Off-Chip Interface} /testbench/dut/uncoregen/uncore/uartgen/uart/SOUT
|
||||
add wave -noupdate -expand -group uncore -group uart -expand -group {Off-Chip Interface} /testbench/dut/uncoregen/uncore/uartgen/uart/RTSb
|
||||
add wave -noupdate -expand -group uncore -group uart -expand -group {Off-Chip Interface} /testbench/dut/uncoregen/uncore/uartgen/uart/DTRb
|
||||
add wave -noupdate -expand -group uncore -group uart -expand -group {Off-Chip Interface} /testbench/dut/uncoregen/uncore/uartgen/uart/OUT1b
|
||||
add wave -noupdate -expand -group uncore -group uart -expand -group {Off-Chip Interface} /testbench/dut/uncoregen/uncore/uartgen/uart/OUT2b
|
||||
add wave -noupdate -expand -group uncore -group uart -expand -group {Off-Chip Interface} /testbench/dut/uncoregen/uncore/uartgen/uart/DSRb
|
||||
add wave -noupdate -expand -group uncore -group uart -expand -group {Off-Chip Interface} /testbench/dut/uncoregen/uncore/uartgen/uart/DCDb
|
||||
add wave -noupdate -expand -group uncore -group uart -expand -group {Off-Chip Interface} /testbench/dut/uncoregen/uncore/uartgen/uart/CTSb
|
||||
add wave -noupdate -expand -group uncore -group uart -expand -group {Off-Chip Interface} /testbench/dut/uncoregen/uncore/uartgen/uart/TXRDYb
|
||||
add wave -noupdate -expand -group uncore -group uart -expand -group {Off-Chip Interface} /testbench/dut/uncoregen/uncore/uartgen/uart/RXRDYb
|
||||
add wave -noupdate -expand -group uncore -group GPIO /testbench/dut/uncoregen/uncore/gpio/gpio/GPIOIN
|
||||
add wave -noupdate -expand -group uncore -group GPIO /testbench/dut/uncoregen/uncore/gpio/gpio/GPIOOUT
|
||||
add wave -noupdate -expand -group uncore -group GPIO /testbench/dut/uncoregen/uncore/gpio/gpio/GPIOEN
|
||||
add wave -noupdate -expand -group uncore -group GPIO /testbench/dut/uncoregen/uncore/gpio/gpio/GPIOIntr
|
||||
add wave -noupdate -expand -group uncore -group GPIO /testbench/dut/uncoregen/uncore/gpio/gpio/PSEL
|
||||
add wave -noupdate -expand -group uncore -group GPIO /testbench/dut/uncoregen/uncore/gpio/gpio/PADDR
|
||||
add wave -noupdate -expand -group uncore -group GPIO /testbench/dut/uncoregen/uncore/gpio/gpio/PWRITE
|
||||
add wave -noupdate -expand -group uncore -group GPIO /testbench/dut/uncoregen/uncore/gpio/gpio/PRDATA
|
||||
add wave -noupdate -expand -group uncore -group GPIO /testbench/dut/uncoregen/uncore/gpio/gpio/PREADY
|
||||
add wave -noupdate -expand -group uncore -group GPIO /testbench/dut/uncoregen/uncore/gpio/gpio/PWDATA
|
||||
add wave -noupdate -expand -group uncore -group GPIO /testbench/dut/uncoregen/uncore/gpio/gpio/PSTRB
|
||||
add wave -noupdate -expand -group uncore -group GPIO /testbench/dut/uncoregen/uncore/gpio/gpio/PENABLE
|
||||
add wave -noupdate -group uncore /testbench/dut/uncoregen/uncore/HADDR
|
||||
add wave -noupdate -group uncore /testbench/dut/uncoregen/uncore/HTRANS
|
||||
add wave -noupdate -group uncore /testbench/dut/uncoregen/uncore/HREADY
|
||||
add wave -noupdate -group uncore /testbench/dut/uncoregen/uncore/HSELRegions
|
||||
add wave -noupdate -group uncore /testbench/dut/uncoregen/uncore/HSELNoneD
|
||||
add wave -noupdate -group uncore /testbench/dut/uncoregen/uncore/HSELPLICD
|
||||
add wave -noupdate -group uncore /testbench/dut/uncoregen/uncore/HRDATA
|
||||
add wave -noupdate -group uncore -group plic /testbench/dut/uncoregen/uncore/plic/plic/UARTIntr
|
||||
add wave -noupdate -group uncore -group plic /testbench/dut/uncoregen/uncore/plic/plic/GPIOIntr
|
||||
add wave -noupdate -group uncore -group plic /testbench/dut/uncoregen/uncore/plic/plic/MExtInt
|
||||
add wave -noupdate -group uncore -group plic /testbench/dut/uncoregen/uncore/plic/plic/SExtInt
|
||||
add wave -noupdate -group uncore -group plic /testbench/dut/uncoregen/uncore/plic/plic/Dout
|
||||
add wave -noupdate -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/intClaim
|
||||
add wave -noupdate -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/intEn
|
||||
add wave -noupdate -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/intInProgress
|
||||
add wave -noupdate -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/intPending
|
||||
add wave -noupdate -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/intPriority
|
||||
add wave -noupdate -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/intThreshold
|
||||
add wave -noupdate -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/nextIntPending
|
||||
add wave -noupdate -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/requests
|
||||
add wave -noupdate -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/irqMatrix
|
||||
add wave -noupdate -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/priorities_with_irqs
|
||||
add wave -noupdate -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/max_priority_with_irqs
|
||||
add wave -noupdate -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/irqs_at_max_priority
|
||||
add wave -noupdate -group uncore -group plic -expand -group internals /testbench/dut/uncoregen/uncore/plic/plic/threshMask
|
||||
add wave -noupdate -group uncore -group CLINT /testbench/dut/uncoregen/uncore/clint/clint/MTIME
|
||||
add wave -noupdate -group uncore -group CLINT /testbench/dut/uncoregen/uncore/clint/clint/MTIMECMP
|
||||
add wave -noupdate -group uncore -group CLINT -expand -group {clint bus} /testbench/dut/uncoregen/uncore/clint/clint/PSEL
|
||||
add wave -noupdate -group uncore -group CLINT -expand -group {clint bus} /testbench/dut/uncoregen/uncore/clint/clint/PADDR
|
||||
add wave -noupdate -group uncore -group CLINT -expand -group {clint bus} /testbench/dut/uncoregen/uncore/clint/clint/PWDATA
|
||||
add wave -noupdate -group uncore -group CLINT -expand -group {clint bus} /testbench/dut/uncoregen/uncore/clint/clint/PSTRB
|
||||
add wave -noupdate -group uncore -group CLINT -expand -group {clint bus} /testbench/dut/uncoregen/uncore/clint/clint/PWRITE
|
||||
add wave -noupdate -group uncore -group CLINT -expand -group {clint bus} /testbench/dut/uncoregen/uncore/clint/clint/PENABLE
|
||||
add wave -noupdate -group uncore -group CLINT -expand -group {clint bus} /testbench/dut/uncoregen/uncore/clint/clint/PRDATA
|
||||
add wave -noupdate -group uncore -group CLINT -expand -group {clint bus} /testbench/dut/uncoregen/uncore/clint/clint/PREADY
|
||||
add wave -noupdate -group uncore -group uart -expand -group Registers /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/LSR
|
||||
add wave -noupdate -group uncore -group uart -expand -group Registers /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/MCR
|
||||
add wave -noupdate -group uncore -group uart -expand -group Registers /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/MSR
|
||||
add wave -noupdate -group uncore -group uart -expand -group Registers /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/RBR
|
||||
add wave -noupdate -group uncore -group uart -expand -group Registers /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/TXHR
|
||||
add wave -noupdate -group uncore -group uart -expand -group Registers /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/LCR
|
||||
add wave -noupdate -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/intrID
|
||||
add wave -noupdate -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/INTR
|
||||
add wave -noupdate -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/rxstate
|
||||
add wave -noupdate -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/txstate
|
||||
add wave -noupdate -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/txbitssent
|
||||
add wave -noupdate -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/txbitsexpected
|
||||
add wave -noupdate -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/rxbitsreceived
|
||||
add wave -noupdate -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/rxbitsexpected
|
||||
add wave -noupdate -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/rxdata
|
||||
add wave -noupdate -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/rxoverrunerr
|
||||
add wave -noupdate -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/rxdataready
|
||||
add wave -noupdate -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/rxdataavailintr
|
||||
add wave -noupdate -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/RXBR
|
||||
add wave -noupdate -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/squashRXerrIP
|
||||
add wave -noupdate -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/rxshiftreg
|
||||
add wave -noupdate -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/SOUTbit
|
||||
add wave -noupdate -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/SINsync
|
||||
add wave -noupdate -group uncore -group uart /testbench/dut/uncoregen/uncore/uartgen/uart/uartPC/txsr
|
||||
add wave -noupdate -group uncore -group uart -expand -group {Off-Chip Interface} /testbench/dut/uncoregen/uncore/uartgen/uart/SIN
|
||||
add wave -noupdate -group uncore -group uart -expand -group {Off-Chip Interface} /testbench/dut/uncoregen/uncore/uartgen/uart/SOUT
|
||||
add wave -noupdate -group uncore -group uart -expand -group {Off-Chip Interface} /testbench/dut/uncoregen/uncore/uartgen/uart/RTSb
|
||||
add wave -noupdate -group uncore -group uart -expand -group {Off-Chip Interface} /testbench/dut/uncoregen/uncore/uartgen/uart/DTRb
|
||||
add wave -noupdate -group uncore -group uart -expand -group {Off-Chip Interface} /testbench/dut/uncoregen/uncore/uartgen/uart/OUT1b
|
||||
add wave -noupdate -group uncore -group uart -expand -group {Off-Chip Interface} /testbench/dut/uncoregen/uncore/uartgen/uart/OUT2b
|
||||
add wave -noupdate -group uncore -group uart -expand -group {Off-Chip Interface} /testbench/dut/uncoregen/uncore/uartgen/uart/DSRb
|
||||
add wave -noupdate -group uncore -group uart -expand -group {Off-Chip Interface} /testbench/dut/uncoregen/uncore/uartgen/uart/DCDb
|
||||
add wave -noupdate -group uncore -group uart -expand -group {Off-Chip Interface} /testbench/dut/uncoregen/uncore/uartgen/uart/CTSb
|
||||
add wave -noupdate -group uncore -group uart -expand -group {Off-Chip Interface} /testbench/dut/uncoregen/uncore/uartgen/uart/TXRDYb
|
||||
add wave -noupdate -group uncore -group uart -expand -group {Off-Chip Interface} /testbench/dut/uncoregen/uncore/uartgen/uart/RXRDYb
|
||||
add wave -noupdate -group uncore -group GPIO /testbench/dut/uncoregen/uncore/gpio/gpio/GPIOIN
|
||||
add wave -noupdate -group uncore -group GPIO /testbench/dut/uncoregen/uncore/gpio/gpio/GPIOOUT
|
||||
add wave -noupdate -group uncore -group GPIO /testbench/dut/uncoregen/uncore/gpio/gpio/GPIOEN
|
||||
add wave -noupdate -group uncore -group GPIO /testbench/dut/uncoregen/uncore/gpio/gpio/GPIOIntr
|
||||
add wave -noupdate -group uncore -group GPIO /testbench/dut/uncoregen/uncore/gpio/gpio/PSEL
|
||||
add wave -noupdate -group uncore -group GPIO /testbench/dut/uncoregen/uncore/gpio/gpio/PADDR
|
||||
add wave -noupdate -group uncore -group GPIO /testbench/dut/uncoregen/uncore/gpio/gpio/PWRITE
|
||||
add wave -noupdate -group uncore -group GPIO /testbench/dut/uncoregen/uncore/gpio/gpio/PRDATA
|
||||
add wave -noupdate -group uncore -group GPIO /testbench/dut/uncoregen/uncore/gpio/gpio/PREADY
|
||||
add wave -noupdate -group uncore -group GPIO /testbench/dut/uncoregen/uncore/gpio/gpio/PWDATA
|
||||
add wave -noupdate -group uncore -group GPIO /testbench/dut/uncoregen/uncore/gpio/gpio/PSTRB
|
||||
add wave -noupdate -group uncore -group GPIO /testbench/dut/uncoregen/uncore/gpio/gpio/PENABLE
|
||||
add wave -noupdate -group RegFile /testbench/dut/core/ieu/dp/regf/rf
|
||||
add wave -noupdate -group RegFile /testbench/dut/core/ieu/dp/regf/a1
|
||||
add wave -noupdate -group RegFile /testbench/dut/core/ieu/dp/regf/a2
|
||||
|
|
@ -654,23 +651,23 @@ add wave -noupdate -group wfi /testbench/dut/core/priv/priv/pmd/STATUS_TW
|
|||
add wave -noupdate -group wfi /testbench/dut/core/priv/priv/pmd/PrivilegeModeW
|
||||
add wave -noupdate -group wfi /testbench/dut/core/priv/priv/pmd/wfi/WFICount
|
||||
add wave -noupdate -group wfi /testbench/dut/core/priv/priv/pmd/WFITimeoutM
|
||||
add wave -noupdate -expand -group testbench /testbench/DCacheFlushStart
|
||||
add wave -noupdate -group testbench /testbench/DCacheFlushStart
|
||||
add wave -noupdate /testbench/dut/core/lsu/hptw/hptw/HPTWLoadPageFault
|
||||
add wave -noupdate /testbench/dut/core/lsu/hptw/hptw/HPTWLoadPageFaultDelay
|
||||
add wave -noupdate -expand -group spi /testbench/dut/uncoregen/uncore/spi/spi/PCLK
|
||||
add wave -noupdate -expand -group spi -expand -group interface /testbench/dut/uncoregen/uncore/spi/spi/SPICLK
|
||||
add wave -noupdate -expand -group spi -expand -group interface /testbench/dut/uncoregen/uncore/spi/spi/SPICS
|
||||
add wave -noupdate -expand -group spi -expand -group interface /testbench/dut/uncoregen/uncore/spi/spi/SPIOut
|
||||
add wave -noupdate -expand -group spi -expand -group interface /testbench/dut/uncoregen/uncore/spi/spi/SPIIn
|
||||
add wave -noupdate -expand -group spi /testbench/dut/uncoregen/uncore/spi/spi/ChipSelectMode
|
||||
add wave -noupdate -expand -group spi /testbench/dut/uncoregen/uncore/spi/spi/SckMode
|
||||
add wave -noupdate -group spi /testbench/dut/uncoregen/uncore/spi/spi/PCLK
|
||||
add wave -noupdate -group spi -expand -group interface /testbench/dut/uncoregen/uncore/spi/spi/SPICLK
|
||||
add wave -noupdate -group spi -expand -group interface /testbench/dut/uncoregen/uncore/spi/spi/SPICS
|
||||
add wave -noupdate -group spi -expand -group interface /testbench/dut/uncoregen/uncore/spi/spi/SPIOut
|
||||
add wave -noupdate -group spi -expand -group interface /testbench/dut/uncoregen/uncore/spi/spi/SPIIn
|
||||
add wave -noupdate -group spi /testbench/dut/uncoregen/uncore/spi/spi/ChipSelectMode
|
||||
add wave -noupdate -group spi /testbench/dut/uncoregen/uncore/spi/spi/SckMode
|
||||
add wave -noupdate /testbench/dut/uncoregen/uncore/spi/spi/TransmitShiftRegLoad
|
||||
add wave -noupdate /testbench/dut/uncoregen/uncore/spi/spi/ShiftEdge
|
||||
add wave -noupdate /testbench/dut/uncoregen/uncore/spi/spi/Active
|
||||
add wave -noupdate /testbench/dut/uncoregen/uncore/spi/spi/TransmitData
|
||||
add wave -noupdate /testbench/dut/uncoregen/uncore/spi/spi/TransmitShiftReg
|
||||
TreeUpdate [SetDefaultTree]
|
||||
WaveRestoreCursors {{Cursor 4} {640 ns} 1} {{Cursor 4} {2400 ns} 1} {{Cursor 3} {214070 ns} 0} {{Cursor 4} {223860 ns} 1}
|
||||
WaveRestoreCursors {{Cursor 4} {640 ns} 1} {{Cursor 4} {2400 ns} 1} {{Cursor 3} {1197 ns} 0} {{Cursor 4} {223860 ns} 1}
|
||||
quietly wave cursor active 3
|
||||
configure wave -namecolwidth 250
|
||||
configure wave -valuecolwidth 194
|
||||
|
|
@ -686,4 +683,4 @@ configure wave -griddelta 40
|
|||
configure wave -timeline 0
|
||||
configure wave -timelineunits ns
|
||||
update
|
||||
WaveRestoreZoom {213740 ns} {214380 ns}
|
||||
WaveRestoreZoom {1130 ns} {1230 ns}
|
||||
|
|
|
|||
53
tests/coverage/amoAccessFault.S
Normal file
53
tests/coverage/amoAccessFault.S
Normal file
|
|
@ -0,0 +1,53 @@
|
|||
///////////////////////////////////////////
|
||||
// hptwAccessFault.S
|
||||
//
|
||||
// Written: Rose Thompson rose@rosethompson.net
|
||||
//
|
||||
// Purpose: Checks that only Store/AMO access faults are generated on AMO operations
|
||||
//
|
||||
// A component of the CORE-V-WALLY configurable RISC-V project.
|
||||
// https://github.com/openhwgroup/cvw
|
||||
//
|
||||
// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
|
||||
//
|
||||
// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
|
||||
// except in compliance with the License, or, at your option, the Apache License version 2.0. You
|
||||
// may obtain a copy of the License at
|
||||
//
|
||||
// https://solderpad.org/licenses/SHL-2.1/
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, any work distributed under the
|
||||
// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
|
||||
// either express or implied. See the License for the specific language governing permissions
|
||||
// and limitations under the License.
|
||||
////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
// load code to initalize stack, handle interrupts, terminate
|
||||
|
||||
#include "WALLY-init-lib.h"
|
||||
|
||||
# run-elf.bash find this in project description
|
||||
main:
|
||||
|
||||
la t1, data # first a valid AMO
|
||||
li t2, 2
|
||||
li t3, 3
|
||||
amoadd.d t3, t2, (t1)
|
||||
|
||||
li t1, 0x90000000 # invalid AMO address
|
||||
li t2, 2
|
||||
li t3, 3
|
||||
amoadd.d t3, t2, (t1)
|
||||
|
||||
fence.I
|
||||
|
||||
finished:
|
||||
j done
|
||||
|
||||
.data
|
||||
|
||||
.align 8
|
||||
data:
|
||||
.8byte 0x1
|
||||
Loading…
Add table
Add a link
Reference in a new issue