github-mirrors/cvw
1
0
Fork 0
mirror of https://github.com/openhwgroup/cvw.git synced 2025-04-24 22:07:12 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

.* in ifu/ifu.sv eliminated

Browse source
This commit is contained in:
kwan 2021-12-02 09:45:55 -08:00
parent 2519d7705b
commit 2a77bc8053
11 changed files with 22 additions and 7 deletions
Download patch file Download diff file Expand all files Collapse all files

2
addins/riscv-arch-test

@ -1 +1 @@
Subproject commit be67c99bd461742aa1c100bcc0732657faae2230
Subproject commit 84d043817f75f752c9873326475e11f16e3a6f7c

2
addins/riscv-isa-sim

@ -1 +1 @@
Subproject commit ddcfa6cc3d80818140a459e590296c3079c5a3ec
Subproject commit d22b280198e74b871e04fc0ddb622fb825fdae49

1
wally-pipelined/linux-testgen/linux-testvectors/all.txt Symbolic link
View file

@ -0,0 +1 @@
/courses/e190ax/buildroot_boot/all.txt

1
wally-pipelined/linux-testgen/linux-testvectors/bootmem.txt Symbolic link
View file

@ -0,0 +1 @@
/courses/e190ax/buildroot_boot/bootmem.txt

1
wally-pipelined/linux-testgen/linux-testvectors/checkpoint8500000 Symbolic link
View file

@ -0,0 +1 @@
/courses/e190ax/buildroot_boot/checkpoint8500000

1
wally-pipelined/linux-testgen/linux-testvectors/ram.txt Symbolic link
View file

@ -0,0 +1 @@
/courses/e190ax/buildroot_boot/ram.txt

1
wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump Symbolic link
View file

@ -0,0 +1 @@
/courses/e190ax/buildroot_boot/vmlinux.objdump

1
wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump.addr Symbolic link
View file

@ -0,0 +1 @@
/courses/e190ax/buildroot_boot/vmlinux.objdump.addr

1
wally-pipelined/linux-testgen/linux-testvectors/vmlinux.objdump.lab Symbolic link
View file

@ -0,0 +1 @@
/courses/e190ax/buildroot_boot/vmlinux.objdump.lab

BIN
wally-pipelined/src/ifu/.ifu.sv.swp Normal file
View file

Binary file not shown.

18
wally-pipelined/src/ifu/ifu.sv
View file

@ -133,13 +133,21 @@ module ifu (
.LoadAccessFaultM(),
.StoreAccessFaultM(),
.DisableTranslation(1'b0),
.Cacheable(),
.Idempotent(),
.AtomicAllowed(),
.*);
.Cacheable(), .Idempotent(), .AtomicAllowed(),
.clk, .reset,
.SATP_REGW,
.STATUS_MXR, .STATUS_SUM, .STATUS_MPRV,
.STATUS_MPP,
.PrivilegeModeW,
.InstrAccessFaultF,
.PMPCFG_ARRAY_REGW, //bitfields?
.PMPADDR_ARRAY_REGW
);
// branch predictor signals
// branch predictor signal
logic SelBPPredF;
logic [`XLEN-1:0] BPPredPCF, PCNext0F, PCNext1F, PCNext2F, PCNext3F;
logic [4:0] InstrClassD, InstrClassE;