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Merge pull request #1298 from coreyqh/fetch_buffer_ch

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Merge PC and instr FBs
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Jordan Carlin 2025-02-25 09:53:01 -08:00 • committed by GitHub
commit 322428c78e
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2 changed files with 21 additions and 41 deletions
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57
src/ifu/fetchbuffer.sv
View file

@ -26,25 +26,17 @@
// and limitations under the License.
////////////////////////////////////////////////////////////////////////////////////////////////
module fetchbuffer
import cvw::*;
#(
parameter cvw_t P,
parameter WIDTH = 32
) (
input logic clk,
reset,
input logic StallF,
StallD,
FlushD,
input logic [WIDTH-1:0] nop,
input logic [WIDTH-1:0] WriteData,
output logic [WIDTH-1:0] ReadData,
output logic FetchBufferStallF,
output logic RisingFBStallF
module fetchbuffer import cvw::*; #(parameter cvw_t P, parameter WIDTH = 32) (
input logic clk, reset,
input logic StallF, StallD, FlushD,
input logic [WIDTH-1:0] nop,
input logic [P.XLEN + WIDTH-1:0] WriteData,
output logic [P.XLEN + WIDTH-1:0] ReadData,
output logic FetchBufferStallF,
output logic RisingFBStallF
);
logic [WIDTH-1:0] ReadReg [P.FETCHBUFFER_ENTRIES-1:0];
logic [WIDTH-1:0] ReadFetchBuffer;
logic [P.XLEN + WIDTH-1:0] ReadReg [P.FETCHBUFFER_ENTRIES-1:0];
logic [P.XLEN + WIDTH-1:0] ReadFetchBuffer;
logic [P.FETCHBUFFER_ENTRIES-1:0] ReadPtr, WritePtr;
logic Empty, Full;
@ -52,37 +44,24 @@ module fetchbuffer
assign Full = |({WritePtr[P.FETCHBUFFER_ENTRIES-2:0], WritePtr[P.FETCHBUFFER_ENTRIES-1]} & ReadPtr); // Same as above but left rotate WritePtr to "add 1"
assign FetchBufferStallF = Full;
logic [2:0] fbEnable;
logic [P.FETCHBUFFER_ENTRIES-1:0] fbEnable;
logic fbEnable;
logic FetchBufferStallFDelay;
assign RisingFBStallF = ~FetchBufferStallFDelay & FetchBufferStallF;
flop #(1) flop1 (
clk,
FetchBufferStallF,
FetchBufferStallFDelay
);
assign fbEnable = WritePtr & {3{(~Full | RisingFBStallF)}};
flopenl #(WIDTH) fbEntries[P.FETCHBUFFER_ENTRIES-1:0] (
.clk,
.load(reset | FlushD),
.en(fbEnable),
.d(WriteData),
.val(nop),
.q(ReadReg)
);
flop #(1) flop1 (clk, FetchBufferStallF, FetchBufferStallFDelay);
assign fbEnable = WritePtr & {P.FETCHBUFFER_ENTRIES{(~Full | RisingFBStallF)}};
flopenl #(P.XLEN + WIDTH) fbEntries[P.FETCHBUFFER_ENTRIES-1:0] (.clk, .load(reset | FlushD), .en(fbEnable), .d(WriteData), .val({{P.XLEN{1'b0}}, nop}), .q(ReadReg));
logic [P.XLEN + WIDTH-1:0] DaoArr [P.FETCHBUFFER_ENTRIES - 1:0];
for (genvar i = 0; i < P.FETCHBUFFER_ENTRIES; i++) begin
assign DaoArr[i] = ReadPtr[i] ? ReadReg[i] : '0;
end
or_rows #(P.FETCHBUFFER_ENTRIES, WIDTH) ReadFBAOMux (
.a(DaoArr),
.y(ReadFetchBuffer)
);
or_rows #(P.FETCHBUFFER_ENTRIES, P.XLEN + WIDTH) ReadFBAOMux (.a(DaoArr), .y(ReadFetchBuffer));
assign ReadData = Empty ? nop : ReadFetchBuffer;
assign ReadData = Empty ? {{P.XLEN{1'b0}}, nop} : ReadFetchBuffer;
always_ff @(posedge clk) begin : shiftRegister
if (reset) begin

5
src/ifu/ifu.sv
View file

@ -305,15 +305,16 @@ module ifu import cvw::*; #(parameter cvw_t P) (
logic NoStallPCF;
if (P.FETCHBUFFER_ENTRIES != 0) begin : fetchbuffer
fetchbuffer #(P) fetchbuff(.clk, .reset, .StallF, .StallD, .FlushD, .nop, .WriteData(PostSpillInstrRawF), .ReadData(InstrRawD), .FetchBufferStallF, .RisingFBStallF());
fetchbuffer #(P) fetchbuff(.clk, .reset, .StallF, .StallD, .FlushD, .nop, .WriteData({PCF, PostSpillInstrRawF}), .ReadData({PCD, InstrRawD}), .FetchBufferStallF, .RisingFBStallF());
logic PCFetchBufferStallD, FetchBufferStallFDelay;
flop #(1) flop1 (clk, FetchBufferStallF, FetchBufferStallFDelay);
assign NoStallPCF = ~FetchBufferStallFDelay & FetchBufferStallF;
fetchbuffer #(P, P.XLEN) PCFetchBuffer(.clk, .reset, .StallF, .StallD, .FlushD, .nop({{1'b1},{(P.XLEN-1){1'b0}}}), .WriteData(PCF), .ReadData(PCD), .FetchBufferStallF(PCFetchBufferStallD), .RisingFBStallF());
// fetchbuffer #(P, P.XLEN) PCFetchBuffer(.clk, .reset, .StallF, .StallD, .FlushD, .nop({{1'b1},{(P.XLEN-1){1'b0}}}), .WriteData(PCF), .ReadData(PCD), .FetchBufferStallF(PCFetchBufferStallD), .RisingFBStallF());
end else begin
flopenl #(32) AlignedInstrRawDFlop(clk, reset | FlushD, ~StallD, PostSpillInstrRawF, nop, InstrRawD);
assign FetchBufferStallF = '0;
flopenrc #(P.XLEN) PCDReg(clk, reset, FlushD, ~StallD, PCF, PCD);
assign NoStallPCF = '0;
end
////////////////////////////////////////////////////////////////////////////////////////////////