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minor code changes and optimizations

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This commit is contained in:
SadhviNarayanan 2025-05-10 10:21:47 -07:00
parent d66daf8ded
commit 3b058ed4bf
3 changed files with 20 additions and 22 deletions
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9
testbench/common/loggers.sv
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@ -3,6 +3,7 @@
//
// Written: Rose Thompson rose@rosethompson.net
// Modified: 14 June 2023
// Modified by sanarayanan@hmc.edu, May 2025
//
// Purpose: Log branch instructions, log instruction fetches,
// log I$ misses, log data memory accesses, log D$ misses, and
@ -181,9 +182,9 @@ module loggers import cvw::*; #(parameter cvw_t P,
assign InvalEdge = dut.core.ifu.InvalidateICacheM & ~InvalDelayed;
initial begin
LogFile = {sim_log_prefix, "ICache.log"};
LogFile = {sim_log_prefix, "ICache.log"}; // Prepend the directory
file = $fopen(LogFile, "w");
$fwrite(file, "BEGIN %s\n", sim_log_prefix);
$fwrite(file, "BEGIN %s\n", memfilename);
end
string AccessTypeString, HitMissString;
always @(*) begin
@ -235,9 +236,9 @@ module loggers import cvw::*; #(parameter cvw_t P,
(AccessTypeString != "NULL");
initial begin
LogFile = {sim_log_prefix, "DCache.log"}; // Otherwise prepend the directory
LogFile = {sim_log_prefix, "DCache.log"}; // Prepend the directory
file = $fopen(LogFile, "w");
$fwrite(file, "BEGIN %s\n", sim_log_prefix);
$fwrite(file, "BEGIN %s\n", memfilename);
end
always @(posedge clk) begin
if(resetEdge) $fwrite(file, "TRAIN\n");

14
testbench/testbench.sv
View file

@ -2,6 +2,7 @@
// testbench.sv
//
// Written: David_Harris@hmc.edu 9 January 2021
//// Modified by sanarayanan@hmc.edu, May 2025
// Modified:
//
// Purpose: Wally Testbench and helper modules
@ -141,6 +142,10 @@ module testbench;
ElfFile = "none";
if (!$value$plusargs("INSTR_LIMIT=%d", INSTR_LIMIT))
INSTR_LIMIT = 0;
// Check if sim_log_prefix is passed as a command-line argument
if (!$value$plusargs("sim_log_prefix=%s", sim_log_prefix)) begin
sim_log_prefix = ""; // Assign default value if not passed
end
//$display("TEST = %s ElfFile = %s", TEST, ElfFile);
// pick tests based on modes supported
@ -293,15 +298,6 @@ module testbench;
assign ResetThreshold = 3'd5;
// Check if sim_log_prefix is passed as a command-line argument
// Inside an initial block
initial begin
// Check if sim_log_prefix is passed as a command-line argument
if (!$value$plusargs("sim_log_prefix=%s", sim_log_prefix)) begin
sim_log_prefix = ""; // Assign default value if not passed
end
end
initial begin
TestBenchReset = 1'b1;
# 100;