github-mirrors/cvw
1
0
Fork 0
mirror of https://github.com/openhwgroup/cvw.git synced 2025-04-19 03:24:50 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

Merge pull request #1363 from coreyqh/ccov

Browse source 
Full privdec code coverage
This commit is contained in:
David Harris 2025-04-15 12:33:16 -07:00 • committed by GitHub
commit 42f78c645b
No known key found for this signature in database
GPG key ID: B5690EEEBB952194
3 changed files with 7 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

3
sim/questa/coverage-exclusions-rv64gc.do
View file

@ -447,6 +447,9 @@ coverage exclude -scope /dut/core/priv/priv/trap -linerange [GetLineNum ${SRC}/p
coverage exclude -scope /dut/core/priv/priv/csr/csru/csru -linerange [GetLineNum ${SRC}/privileged/csru.sv "assign WriteFRMM"] -item e 1 -fecexprrow 3
coverage exclude -scope /dut/core/priv/priv/csr/csru/csru -linerange [GetLineNum ${SRC}/privileged/csru.sv "assign WriteFFLAGSM"] -item e 1 -fecexprrow 3
# Attempted writes to the nonextistant MTIME register trap, so WriteHPMCOUNTERM cannot be set for that address (0xb01)
coverage exclude -scope /dut/core/priv/priv/csr/counters/counters/cntr[1] -linerange [GetLineNum ${SRC}/privileged/csrc.sv "MTIME traps"] -item e 1 -fecexprrow 2 4
coverage exclude -scope /dut/core/priv/priv/csr/counters/counters/cntr[1] -linerange [GetLineNum ${SRC}/privileged/csrc.sv "assign NextHPMCOUNTERM"] -item b 1
####################
# EBU

2
src/privileged/csrc.sv
View file

@ -129,7 +129,7 @@ module csrc import cvw::*; #(parameter cvw_t P) (
// Counter update and write logic
for (i = 0; $unsigned(i) < P.COUNTERS; i = i+1) begin:cntr
assign WriteHPMCOUNTERM[i] = CSRMWriteM & (CSRAdrM == MHPMCOUNTERBASE + i);
assign WriteHPMCOUNTERM[i] = CSRMWriteM & (CSRAdrM == MHPMCOUNTERBASE + i); // coverage tag: MTIME traps
assign NextHPMCOUNTERM[i][P.XLEN-1:0] = WriteHPMCOUNTERM[i] ? CSRWriteValM : HPMCOUNTERPlusM[i][P.XLEN-1:0];
always_ff @(posedge clk) //, posedge reset) // ModelSim doesn't like syntax of passing array element to flop
if (reset) HPMCOUNTER_REGW[i][P.XLEN-1:0] <= '0;

3
tests/coverage/priv.S
View file

@ -309,6 +309,9 @@ sretdone:
# exercise sret with rs1 not 0
.word 0x102F8073
# illegal ebreak with nonzero rs1
.word 0x00110073
# cover mret when mpp = 3 and mprv = 1
li a0, 3